We work closely with our clients, building effective partnerships to deliver high-quality solutions tailored to their needs. With a proven track record of successful projects, we are committed to excellence and innovation in semiconductor design.

SOC Design Verification Engineer

Location: Bangalore, India

Experience: 5+ Years

Job Description:

To Develop SV/UVM testbench for IP/SOC/ Subsystems, Integrate various VIPs, come up with a testplan, write focussed/random/constrained-random sequences, run regressions and debug. Write coverpoints and drive coverage . Develop scoreboard, checkers and monitors.

Requirement :

Should possess B.Tech/M.Tech in Electronics/VLSI or equivalent.
Experience in developing IP/SOC or SubSystems level testbenches from scratch.
Should be able to work in complex SV/UVM environment, modify testbench as per requirement.
Should be very well conversant with SV/UVM methodology, OOP concepts.

Should have worked on one or more domains/functions below

AXI, APB,AHB
SPI,I2C, UART
PCIe, USB, Ethernet, CXL, Ucie, C2C, D2D
DDR4/5/6, LPDDR3/4/5/6
NoC/Interconnect verification

Should have involved in some of the below activities

Boot, Reset, Clock verification
Low Power Verification
Constraint Random sequence writing
Regression management and debug
Development of Scoreboard, Checkers and tracker.
Scripting language like PERL,PYTHON
AI/ML network understanding (good to have).

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Design Verification Engineer