Posted:13 hours ago|
Platform:
Work from Office
Full Time
Roles and Responsibilities Design verification using UVM (Universal Verification Methodology) for IP/SoC level verification. Develop test benches from scratch, including creating drivers, monitors, and predictors. Utilize System Verilog to write verification code and debug issues. Collaborate with cross-functional teams to identify requirements and develop test plans. Participate in peer reviews to ensure high-quality deliverables. Desired Candidate Profile 4-10 years of experience in SOC/IP Verification with expertise in DV on Cpu, DDR, Ethernet, PCIe protocols. Bachelor's degree (B.Tech/B.E.). Master's degree preferred but not mandatory (M.Tech). Strong understanding of GLS (Global Logic Synthesis) concepts.
Coventine Digital
Upload Resume
Drag or click to upload
Your data is secure with us, protected by advanced encryption.
Browse through a variety of job opportunities tailored to your skills and preferences. Filter by location, experience, salary, and more to find your perfect fit.
We have sent an OTP to your contact. Please enter it below to verify.
Instantly access job listings, apply easily, and track applications.
Hyderabad, Bengaluru
6.5 - 16.5 Lacs P.A.
Noida, Hyderabad, Bengaluru
20.0 - 35.0 Lacs P.A.
Noida, Hyderabad, Bengaluru
17.0 - 30.0 Lacs P.A.
Hyderabad, Chennai, Bengaluru
27.5 - 42.5 Lacs P.A.
Noida, Hyderabad, Bengaluru
17.0 - 32.0 Lacs P.A.
15.0 - 30.0 Lacs P.A.
20.0 - 35.0 Lacs P.A.
Bengaluru, India
8.0 - 16.0 Lacs P.A.
5.0 - 6.0 Lacs P.A.
6.0 - 10.0 Lacs P.A.
