291 Chip Design Jobs - Page 6

Category Engineering Hire Type Employee Job ID 9020 Remote Eligible No Date Posted 25/03/2025 ASIC Verification- Principal Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned verification engineer with a passion for cutting-edge technology. With a BSEE in Electrical Engineering and over 10 years of relevant experience, or an MSEE with over 8 years, you bring a wealth of knowledge in developing System Verilog based test environments, implementing test plans, and extracting verification metrics. You possess strong HVL coding skills and hands-on experience with industry-standard simulators such as VCS, NC, or MTI, and waveform-based debugging tools. Your familiarity with verification methodologies like VMM, OVM, or UVM is solid, and you have a deep understanding of protocols such as AMBA, SD/eMMC, MIPI-I3C/UFS/Unipro, Ethernet, DDR, PCIe, and USB. Your experience with Scatter Gather DMA and exposure to serial protocols like SPI/I2C/I2S/UART are highly valued. Additionally, you are proficient in scripting languages such as Perl, TCL, or Python, and have knowledge of HDLs like Verilog. Your exposure to VC Formal and IP design and verification processes, including VIP development, is an added advantage. You exhibit excellent written and oral communication skills, demonstrate strong analytical and problem-solving abilities, and show high levels of initiative. This role is not open for college fresh grads and requires prior industry experience. What You'll Be Doing: * Specify, design/architect, and implement state-of-the-art verification environments for the Synopsys family of synthesizable cores. * Perform verification tasks for IP cores, ensuring they meet the highest standards of quality. * Collaborate closely with RTL designers and be part of a global team of expert verification engineers. * Work on next-generation AMBA protocols and serial protocols for commercial, enterprise, and automotive applications. * Engage in test planning, test environment coding at both unit and system levels, test case coding and debugging, and FC coding and analysis. * Manage regression and meet quality metric goals. The Impact You Will Have: * Ensure the reliability and performance of Synopsys IP cores, contributing to the success of our cutting-edge products. * Drive innovations in verification methodologies, enhancing the efficiency and effectiveness of our processes. * Collaborate with a global team to deliver high-quality solutions that meet the needs of our customers. * Support the development of next-generation technologies that will shape the future of various industries. * Contribute to the continuous improvement of verification practices and standards within the organization. * Play a key role in the successful delivery of IP cores for commercial, enterprise, and automotive applications. What You'll Need: * BSEE in Electrical Engineering with 10+ years of relevant experience or MSEE with 8+ years of relevant experience. * Experience in developing System Verilog based test environments and implementing test plans. * Strong HVL coding skills and hands-on experience with industry-standard simulators and waveform-based debugging tools. * Familiarity with verification methodologies such as VMM, OVM, or UVM. * Knowledge of protocols such as AMBA, SD/eMMC, MIPI-I3C/UFS/Unipro, Ethernet, DDR, PCIe, and USB. Who You Are: * Excellent written and oral communication skills. * Strong analytical and problem-solving abilities. * High levels of initiative and the ability to work independently. * Collaborative mindset with the ability to work effectively in a global team environment. * Detail-oriented with a focus on quality and continuous improvement. The Team You'll Be A Part Of: You will be part of the R&D in Solutions Group at our Bangalore Design Center, India. This dynamic team focuses on IP verification and works on technically challenging IP cores using the latest verification methodologies and flows. You will collaborate with RTL designers and verification engineers across multiple sites, contributing to the development of next-generation technologies. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 9622 Remote Eligible No Date Posted 25/03/2025 Formal Verification Principal Engineer: We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled and experienced Formal Verification Specialist with a strong background in RTL design and a passion for ensuring the correctness and reliability of digital designs. You have a minimum of 10+ years of industry experience, with at least the last 5 years focused on formal techniques for verification. You possess deep knowledge of architectures of designs and digital logic, synthesis flow, static timing flows, and formal checking. Your hands-on experience with HDLs such as Verilog or System Verilog and understanding of temporal logic assertions make you an ideal candidate for this role. You have worked on complex verification projects and have experience with formal verification tools like Jasper or VC-Formal. Your skills in Python, Perl, or Shell scripting are a plus. You are a team player with excellent communication skills, capable of mentoring junior engineers and collaborating with geographically diverse cross-functional teams. Your problem-solving abilities and attention to detail enable you to debug RTL designs effectively and identify causes of failure scenarios. You hold a Bachelor's or Master's degree in Computer Science or Electrical Engineering from a reputed engineering college. What You'll Be Doing: * Specifying, implementing, and maintaining an integrated end-to-end formal verification flow for the formal verification objective. * Guiding and training team members on effective usage of FV tools. * Reviewing formal setups and proofs with design and verification teams. * Maintaining and extending assertion libraries, including support for both simulation and formal verification. * Identifying key behaviors for verification of DUT and creating a formal verification plan. * Developing verification environments, including environment assumptions, assertions, and cover properties in the context of the verification plan. * Applying various formal verification techniques to prove the correctness of digital designs. * Debugging RTL to identify causes of failure scenarios. The Impact You Will Have: * Enhance the reliability and quality of our digital designs through rigorous formal verification. * Contribute to the development of high-performance silicon chips and software content. * Improve the overall design and verification process by maintaining and extending assertion libraries. * Facilitate knowledge sharing and skill development within the team by providing guidance and training on FV tools. * Ensure the correctness of designs by identifying key behaviors and creating comprehensive verification plans. * Support the success of geographically diverse cross-functional teams through effective collaboration and communication. What You'll Need: * Strong knowledge of architectures of designs and digital logic. * Experience with synthesis flow and static timing flows, formal checking, etc. * Hands-on experience with HDLs such as Verilog / System Verilog. * Understanding of temporal logic assertions. * Experience with at least one formal verification tool (e.g., Jasper, VC-Formal). * Experience with complex verification projects that used formal techniques for closure. * Skills in Python, Perl, or Shell scripting (a plus). Who You Are: * A seasoned professional with a comprehensive understanding of formal verification techniques. * A collaborative team player with excellent communication skills. * A problem solver with strong debugging skills. * A mentor capable of guiding junior engineers and interns. * An individual with a proactive and detail-oriented approach to work. The Team You'll Be A Part Of: You will be part of the Solutions Group at our Bangalore Design Center, India. This team focuses on delivering high-quality digital designs and verification solutions. The position offers learning and growth opportunities, allowing you to work with a diverse group of talented engineers. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 9898 Remote Eligible No Date Posted 25/03/2025 Analog Design, Manager (high-speed circuit design) We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: We are looking for a seasoned and enthusiastic professional who thrives on problem-solving, is committed to ongoing learning, and is eager to work with advanced technologies. You possess outstanding communication skills and enjoy working in a dynamic team of highly talented engineers. As the Manager- Analog Design, you have a deep understanding of deep understanding of high-speed circuit design. You are experienced in leading teams, designing and analyzing analog circuits, combined with your knowledge of network/transmission line/SI analysis and semiconductor devices/physics, makes you a valuable asset. managing regression analysis and collaborating closely with design, layout and other stakeholders.You have experience in modeling complex/non-linear circuit behavior to linear models for stability and jitter analysis. Your ability to micro-architect circuits from specifications and focus on enhancing PPA targets and reducing turnaround time sets you apart. You possess a strong grip on design reliability analysis and can work effectively both independently and lead the team. Your excellent communication skills and collaborative nature enable you to work seamlessly with cross-functional teams to achieve project goals. You are dedicated to staying updated with the latest advancements in analog design and are eager to contribute to innovative solutions that shape the future of technology. What You'll Be Doing: * Collaborate with design, Layout, ESD teams to align requirements and resolve bottlenecks effectively. * Innovate and refine design methodologies to enhance scalability, efficiency, and reliability. * Design, develop, and verify high-speed analog and mixed-signal integrated circuits. * Collaborate with cross-functional teams to define design specifications and requirements. * Model complex/non-linear circuit behavior to linear models for stability and jitter analysis. * Perform circuit simulations and layout verification to ensure design accuracy and performance. * Optimize designs for power, performance, and area (PPA) and reduce turnaround time. * Contribute to the development of design methodologies and best practices. The Impact You Will Have: * Advance the design and verification of high-speed analog and mixed-signal integrated circuits. * Ensure the accuracy and reliability of analog designs through rigorous verification and testing. * Collaborate with cross-functional teams to deliver innovative solutions that meet market demands. * Contribute to the continuous improvement of design methodologies and processes. * Support the development of cutting-edge technologies that enhance our products and services. * Drive innovation and excellence in analog design at Synopsys. What You'll Need: * Bachelor's degree in electrical engineering, Computer Engineering, or a related field. * 10+ years of experience in analog circuit design and analysis. * Deep understanding of analog circuits design and analysis techniques. * Experience in modeling complex/non-linear circuit behavior to linear models for stability and jitter analysis. * Good understanding of network/transmission line/SI analysis and semiconductor devices/physics. * Strong grip on design reliability analysis. * Ability to micro-architect circuits from specifications. * Focus on enhancing PPA targets and reducing turnaround time. Who You Are: * A strong leader with excellent communication and mentoring skills. * Innovative and committed to continuous improvement. * Detail-oriented with a strategic mindset. * Collaborative, with the ability to work effectively in a team environment. * Passionate about technology and eager to work on cutting-edge projects. You are a meticulous and innovative Leader who excels in high-speed analog and mixed-signal design. Your ability to communicate effectively and work collaboratively with cross-functional teams makes you an essential team Leader. You have a passion for staying current with the latest advancements in analog design and are always looking for ways to improve design methodologies and processes. Your strong technical skills, combined with your problem-solving abilities and attention to detail, enable you to tackle complex challenges and drive innovation at Synopsys. The Team You'll Be A Part Of: You will join a team of dedicated professionals who are passionate about analog and mixed-signal design. Our team collaborates closely with various business groups to deliver high-performance integrated circuits that meet market demands. We value innovation, collaboration, and continuous learning, and we are committed to making a significant impact on the future of technology. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. If you have the capability to make things happen, drive results and work with a Yes-if attitude, then Synopsys Inc will provide the right environment for you to prosper. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 10560 Remote Eligible No Date Posted 08/04/2025 Analog Design, Sr Engineer-10560 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly motivated and experienced professional with a deep understanding of VLSI design and a strong background in high-speed protocols Analog Circuit Design - CMOS circuit design and layout methodology & flow. Familiarity with ASIC design flow. Knowledge of JEDEC requirements for DDR interfaces & standards, DDR Timing, ODT and SDRAM functionality would be a plus. What You'll Be Doing: DDR/HBM Memory Interface I/O Circuit and layout design including GPIO and Special IO's. - Work with DDR/HBM PHY team, package engineers and system engineers to meet design specifications. What You'll Need: * Bachelor's and/or Master's Degree in Electrical Engineering or similar with a focus on VLSI design. * Experience Required: 1 - 3 yrs Who You Are: * Creative and results-oriented, capable of managing multiple tasks concurrently. * Strong verbal and written communication skills in English. * Ability to work collaboratively across teams to deliver solutions to customers. * Strong analytical, reasoning, and problem-solving skills. * Willingness to travel occasionally to support customer engagements. The Team You'll Be A Part Of: The team focuses on enabling our Interface IP customers to integrate the IP into their SoC and assist them through their design flows, debugging critical issues, and supporting silicon bring-up. This collaborative team works closely with customers to ensure the successful deployment of Synopsys leading Interface IP products in various market segments. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 7768 Remote Eligible No Date Posted 27/03/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an experienced and passionate GPU R&D Engineer with a strong background in optimizing and implementing GPU-accelerated algorithms. You have a deep understanding of CUDA or similar technologies, and you excel in performance improvements and integration with existing tools. Your expertise in algorithms and data structures, combined with your collaborative skills, make you a valuable asset to any team. You are always eager to stay current on GPU technology trends and incorporate the latest advancements into your work. With at least 8 years of experience, you are ready to take on challenging projects and deliver optimal solutions rapidly, contributing to the fast-paced environment at Synopsys. What You'll Be Doing: Optimize existing GPU implementations for ILT software. Design new GPU-accelerated algorithms for large-scale geometric data handling for ILT. Collaborate with cross-functional teams to ensure seamless integration of GPU features. Lead benchmarking and performance testing initiatives. Stay current on GPU technology trends and design the latest advancements into the system. Work closely with customers and hardware vendors to deliver optimal solutions swiftly. The Impact You Will Have: Enhance the performance and efficiency of ILT software through optimized GPU implementations. Drive innovation in GPU-accelerated algorithms for complex geometric data handling. Ensure the seamless integration of GPU features within existing Mask Synthesis tools. Lead initiatives that set new benchmarks for performance and reliability. Keep Synopsys at the forefront of GPU technology advancements. Accelerate the manufacturing of new chips by delivering rapid and optimal solutions. What You'll Need: Bachelor's, Master's, or Ph.D. in Computer Science or a related field. At least 8 years of experience in GPU optimization and implementation. Advanced knowledge of CUDA or similar technologies. Proficiency in C/C++, Python, and distributed computing environments. Strong understanding of algorithms and data structures. Who You Are: Exceptional troubleshooting and collaborative skills. Passionate about staying up-to-date with the latest GPU technology trends. Detail-oriented and committed to delivering high-quality solutions. Strong communicator with the ability to work effectively in cross-functional teams. Innovative thinker who thrives in a fast-paced, dynamic environment. The Team You'll Be A Part Of: You will be part of a dedicated team of engineers focused on developing and optimizing ILT software. The team collaborates closely with customers, hardware vendors, and cross-functional groups within Synopsys to ensure the delivery of cutting-edge solutions. Together, we strive to push the boundaries of what is possible in the EDA industry. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned technical writer with a passion for making complex information accessible and engaging. With a keen eye for detail and a deep understanding of technical writing standards, you excel in creating comprehensive and clear documentation for highly technical audiences. You thrive in fast-paced environments, and your ability to learn new technologies quickly sets you apart. Your excellent communication skills enable you to collaborate effectively with engineers, designers, and other stakeholders, ensuring that the documentation you produce meets the highest standards of quality and usability. You have a strong background in engineering or science, with a Bachelor's or Master's degree to support your technical expertise. With 5 to 12 years of experience in technical writing within a software product development company, you bring a wealth of knowledge and best practices to the role. Your proficiency in DITA and XML authoring tools, as well as your familiarity with UNIX or Linux, make you an invaluable asset to the team. Additionally, your experience with electronic design automation (EDA) tools gives you a unique perspective that enhances your ability to create relevant and impactful documentation. What You'll Be Doing: * Developing and maintaining documentation for EDA products used by chip designers and scientists. * Planning, organizing, and creating user guides, reference material, and release notes for design engineering audiences. * Researching and organizing initial source material into high-quality drafts, including product specifications, training materials, and engineering input. * Collaborating with Applications and R&D engineers to solicit feedback and reviews. * Implementing good standard writing practices to develop clear and concise technical content. * Ensuring documentation is up-to-date with the latest product releases and features. The Impact You Will Have: * Enhancing the usability and adoption of Synopsys products through clear and comprehensive documentation. * Supporting the success of chip designers and scientists by providing them with the information they need to effectively use Synopsys tools. * Improving customer satisfaction by addressing their requirements through well-crafted documentation. * Contributing to the overall quality and reliability of Synopsys products by ensuring accurate and detailed documentation. * Facilitating better communication and collaboration between engineering teams and end-users. * Helping to drive continuous improvement in documentation processes and standards. What You'll Need: * Bachelor's or Master's degree in Engineering or Science. * 5 to 12 years of technical writing experience in a software product development company. * Good knowledge of technical writing standards and processes. * Ability to grasp new technology quickly. * Excellent written and verbal communication skills. * Experience with DITA and XML authoring tools such as Oxygen XML Author. * Working knowledge of UNIX or Linux. * Experience with electronic design automation (EDA) tools. Who You Are: * A detail-oriented professional with a passion for technical writing. * A quick learner who adapts easily to new technologies and processes. * An excellent communicator who can convey complex information clearly and effectively. * A team player who collaborates well with engineers and other stakeholders. * A proactive problem-solver who can make decisions quickly and reprioritize tasks as needed. The Team You'll Be A Part Of: You will join a dynamic team dedicated to developing and updating product documentation for Synopsys product releases. This team includes experienced technical writers, engineers, and product managers who work collaboratively to create high-quality documentation that meets the needs of our highly technical audience. Together, you will contribute to the success of Synopsys products by ensuring that users have access to clear, accurate, and comprehensive information. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 10225 Remote Eligible No Date Posted 28/03/2025 R&D Engineering, Custom Circuit Architect Our Silicon Lifecycle Management (SLM) business is all about building next-generation intelligent in-chip sensors, hardware/software capabilities and analytics to integrate into technology products to manage and improve each semiconductor lifecycle stage. We offer the world's first full hardware IP, test, and end-to-end analytics to help customers integrate faster, optimize performance/power/area/schedule/yield, and enhance reliability. Meeting the unique challenges posed by various target applications, SLM enables differentiated products to market quickly with reduced risk. We are seeking an experienced, initiative-taking, and high-calibre individual to join our SLM Monitors group as a Monitor IP Design, Architect. Someone who thrives in a collaborative environment and has a passion for creating innovative technology. Have a strong technical background in Custom Circuit design, System Design, methodologies and tools and is adept at working with advanced finfet / GAA process challenges. Proactive analytical person with a keen eye for detail and a dedication to delivering high-quality results. Excellent communication and people skills and can collaborate effectively with internal teams and external customers. Driven by a desire to innovate and contribute to the success of our innovative technology products. Job Descriptions Looking forward towork on conceptualizing, designing and productizing state of the art Monitor IP to be used in SLM monitors realized though ASIC design flow. Work on Architecting sensing elements for on-chip Process, Voltage, Temperature, glitch and Droop monitors for monitoring silicon biometrics. You will be the part of SLM team. Individual should have strong technical experience in full custom mixed-signal circuit design, circuit simulations, working knowledge of custom layout, and pre-post-silicon characterization. Additional responsibilities include: Development of statistical simulation methodologies. Liaising with layout team to achieve best possible design solution. End to end ownership of the designed custom cells. Deployment of new circuits into test chips and post-silicon characterization Architecting new sensors and enhancing existing ones through collaboration with other architects and stakeholders. Building and refining design flows to enhance efficiency and effectiveness. Conducting pre and post-layout simulations and characterization across various design corners. Ensuring designs meet advanced finfet / GAA reliability and aging, reliability and Automotive grade requirements Working closely with the RTL, Verification and Physical Design teams for ensuing integration and Quality. Owning the product from Spec to Silicon report. Preferred skills: Strong custom design experience specification, circuit design description and schematics. Strong understanding of device Physics and Can work independently and debug and provide circuit solutions. Hands on experience with circuit design & simulation tools, IC design CAD packages from any EDA vendor Strong understanding of SPICE simulator concepts and simulation methods Familiar with circuit simulation tools like PrimeSim, FineSim, HSPICE or similar Must have prior experience with Custom Compiler or equivalent schematic & Layout editor tools Experience with statistical design methodology like generating and analyzing Monte-Carlo results Awareness of post-layout extraction & simulation, testing in conjunction with silicon validation Demonstrated technical expertise in the productization of advanced technologies. Job Requirements BS or MS degree in Electrical Engineering with 15+ years of relevant industry experience. Sound knowledge of custom / Standard cell design methodologies, layout tools, and physical verification. Familiarity with advanced finfet / GAA process challenges, simulation techniques and modeling. At Synopsys, we're at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we're powering it all with the world's most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you. Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 10560 Remote Eligible No Date Posted 08/04/2025 Analog Design, Sr Engineer-10560 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly motivated and experienced professional with a deep understanding of VLSI design and a strong background in high-speed protocols Analog Circuit Design - CMOS circuit design and layout methodology & flow. Familiarity with ASIC design flow. Knowledge of JEDEC requirements for DDR interfaces & standards, DDR Timing, ODT and SDRAM functionality would be a plus. What You'll Be Doing: DDR/HBM Memory Interface I/O Circuit and layout design including GPIO and Special IO's. - Work with DDR/HBM PHY team, package engineers and system engineers to meet design specifications. What You'll Need: * Bachelor's and/or Master's Degree in Electrical Engineering or similar with a focus on VLSI design. * Experience Required: 1 - 3 yrs Who You Are: * Creative and results-oriented, capable of managing multiple tasks concurrently. * Strong verbal and written communication skills in English. * Ability to work collaboratively across teams to deliver solutions to customers. * Strong analytical, reasoning, and problem-solving skills. * Willingness to travel occasionally to support customer engagements. The Team You'll Be A Part Of: The team focuses on enabling our Interface IP customers to integrate the IP into their SoC and assist them through their design flows, debugging critical issues, and supporting silicon bring-up. This collaborative team works closely with customers to ensure the successful deployment of Synopsys leading Interface IP products in various market segments. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 10094 Remote Eligible No Date Posted 01/04/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: We are seeking innovative and out-of-the-box thinking Design For Test (DFT) Engineers to be a part of the Fast Solution Team under the Test Group at Synopsys. You are someone who thrives in a project-oriented environment, delivering comprehensive DFT solutions ranging from integration to silicon bring-up for customers designing digital ICs of varying complexity. You excel in assessing customer methodologies and flows, gathering requirements, and proposing solutions. You are adept at providing technical support to ensure customer success and satisfaction, winning new customers through product demonstrations, evaluations, and competitive benchmarking. You are skilled in resolving technical problems, training, and account management, and you can interact effectively with end-users at customer sites and with first-level managers. You are also responsible for working with Solution Architects to develop and productize the next-gen test technologies. Your role involves prototyping new methodologies, analyzing gathered data, identifying the viability of technology, and presenting the findings under the guidance of a Solution Architect. What You'll Be Doing: Providing expertise for test solutions during design planning, budgeting, and implementation. MBIST implementation and validation, including BIST architecture planning, memory grouping, pattern generation, validation, silicon bring-up, diagnostics analysis, and debug. Participating in customer's design and flow reviews. Driving, prototyping, and developing new Design for Test methodologies. Multitasking across various issues and priorities to help customers exploit new technologies. Collaborating with Solution Architects to develop and productize next-gen test technologies. The Impact You Will Have: Enhancing Synopsys ability to deliver cutting-edge test solutions that meet customer needs. Contributing to the successful integration and silicon bring-up of complex digital ICs. Ensuring high customer satisfaction through effective technical support and problem resolution. Driving innovation in test methodologies and technologies. Supporting the development of next-gen test technologies that push the boundaries of what's possible. Playing a key role in winning new customers and expanding Synopsys market presence. What You'll Need: Minimum BS+10 years of relevant experience/MS+8 years of relevant experience in Electrical Engineering, Computer Engineering, or other relevant fields of study. Experience with RTL coding, DFT insertion, ATPG, MBIST architecture planning, insertion, validation, pattern generation, and silicon bring-up. Excellent knowledge of memory BIST flows, memory fault models, MBIST algorithms, hard/soft repair, and eFuse repair flow. Experience in handling memory BIST for large, complex SoCs with various IPs. Exposure to MBIST of automotive designs is a plus. Good understanding of protocols like 1149.1, 1500, 1687. Who You Are: You possess excellent soft skills and can communicate effectively with various stakeholders. You are highly motivated, proactive, and can work independently with limited supervision. Your advanced knowledge and wide-ranging experience enable you to work on complex issues requiring in-depth evaluation of various factors. You are a sophisticated professional who can communicate and influence parties within and outside your subfamily area. The Team You'll Be A Part Of: The Test Group at Synopsys is a critical part of the change, delivering a complete DFT solution to fulfill customer needs. You will be part of the Fast Solution Team, working closely with Solution Architects and other engineers to develop and productize next-gen test technologies. This team is dedicated to driving innovation and ensuring customer success through comprehensive test solutions. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a proactive and detail-oriented individual with a passion for People Operations. With 0 - 2 years of experience in HR operations, you have a solid foundation in managing the employee lifecycle from pre-onboarding through offboarding. Your experience with HRIS systems, ServiceNow, particularly SuccessFactors or similar tools, equips you with the skills to handle complex employee data and processes. You hold a BA/BS degree and have honed your ability to manage multiple tasks and deadlines with exceptional organizational skills. Your strong stakeholder partnering skills enable you to collaborate effectively with various teams, ensuring the delivery of impactful HR solutions. You are familiar with Microsoft Office and project management tools, and your excellent written and spoken communication skills make you a reliable and clear communicator. Your resourceful problem-solving abilities allow you to troubleshoot issues independently and drive meaningful solutions. What You'll Be Doing: Collaborate effectively with stakeholders to proactively determine and deliver relevant and impactful People (HR) operation solutions to business and system challenges. - Accurately perform employee lifecycle transactions/processes, including onboarding, offboarding, transfers/job status changes, timekeeping, time off and leave, extended workforce, and other responsibilities as assigned. - Recommend and draft employee lifecycle processes and procedures that enhance and optimize existing HR practices, ensuring they remain fit for purpose and benefit stakeholder teams. - Be a trusted resource for People (HR) systems, data, and process knowledge to interpret and analyze processes. - Drive People operation enhancements by supporting new module roll-out and optimization initiatives. - Manage requests, workflows, and develop a knowledge base and reporting metrics using ServiceNow. The Impact You Will Have: Streamline HR processes to improve efficiency and accuracy in employee lifecycle management. - Enhance stakeholder satisfaction by delivering timely and effective HR solutions. - Contribute to the optimization of HR practices, ensuring they are aligned with organizational goals. - Support the successful rollout and adoption of new HR modules and tools. - Provide valuable insights and data analysis to drive informed decision-making in HR operations. - Foster a collaborative and supportive HR environment, building trust with stakeholders and team members. What You'll Need: 0 - 2 years of People (HR) operations related APAC work experience. - BA/BS degree. - Experience with HRIS administration, particularly SuccessFactors or similar tools. - Knowledge of managing requests, workflows, developing knowledgebase, and reporting metrics using ServiceNow. - Exceptional organizational skills and attention to detail. - Proficiency in Microsoft Office suite and familiarity with project management tools. - Excellent written and spoken communication skills. Who You Are: Detail-oriented and organized. - Resourceful problem-solver. - Effective communicator. - Collaborative team player. - Proactive and initiative-driven. The Team You'll Be A Part Of: You will be part of a dynamic People Operations team focused on delivering exceptional HR services and solutions. Our team collaborates closely with various stakeholders to ensure smooth HR operations and continuous improvement of HR processes. We value innovation, teamwork, and a commitment to excellence in all our endeavors. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 10431 Remote Eligible No Date Posted 03/04/2025 Sr. Staff- ASIC Verification. This is a verification focused individual contributor's role. The candidate will be part of the DesignWare IP Verification R&D team at our Bangalore Design Center, India. Implement state-of-the-art Verification environments for the DesignWare family of synthesizable cores and perform Verification tasks for the IP cores. Work closely with RTL design team and be part of a global team of expert Verification Engineers. Domains will include but not be limited to USB, PCI Express, Ethernet,AMBA. Job role will have a combination of Test planning, Test environment coding both at unit level and system level, Test case coding and debugging, FC coding and analysis and meeting quality metric goals and regression management. Requirements: - BS/BE in EE with 8+ years of relevant experience or MS with 6+ years of relevant experience in the verification of IP cores and/or SOC verification. - Experience in developing HVL based test environments, developing and implementing test plans, implementing and extracting verification metrics such as functional coverage. - HVL coding skills for Verification and be hands-on with one or more Industry standard simulators such as VCS, NC, MTI used in Verification and relevant debugging tools. - Exposure to verification methodologies such as UVM/VMM/OVM is required. - Familiarity with HDLs such as Verilogand scripting languages such as perl is highly desired. - Exposure to IP design and verification processes including VIP development is an added advantage. - Basic understanding of functional & Code coverage. - It is essential that the individual has good written and oral communication skills and is able to demonstrate good analysis, debug and problem solving skills and be self-driven. Our Silicon IP business is all about integrating more capabilities into an SoCfaster. We offer the world's broadest portfolio of silicon IPpredesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk. At Synopsys, we're at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we're poweringit all with the world's most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 10442 Remote Eligible No Date Posted 03/04/2025 Job role: At Synopsys, we're at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we're powering it all with the world's most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you. Our Silicon IP business is all about integrating more capabilities into an SoCfaster. We offer the world's broadest portfolio of silicon IPpredesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk. We're looking for ASIC Digital Verification Engineers with different experience levels to join the team! Does this sound like a good role for you You will be working on VLSI IP verification of controllers related to complex protocols.You will be part of the Solutions Group at our Bangalore Design Center, India. The position offers learning and growth opportunities. This is a Technical Individual Contributor role and offers challenges to work in a multi-site environment on technically challenging IP Cores in the Verification domain. Job Responsibilities - Understand Standard Specifications/ the functional specifications/ feature enhancements for the product and create micro-architecture and detailed design for some of the components of the Test Environment for the DesignWare family of synthesizable cores in protocol areas such as Ethernet/DSC/AMBA (AMBA2, AXI, CHI)/ SD/eMMC/DDR/PCIe/ USB/ MIPI Be an individual contributor in the Verification Tasks Architect testbenches, coding of TE, debug, verification coverage improvement, etc. Will contribute to technical review of TE Code of medium complexity. Will contribute to technical process and quality improvement to achieve high quality deliveries Will be expected to Solve complex/ abstract problems The candidate should be able to analyze the coverage metrics and improve them with definition of additional test cases in CRV environment. The candidate will work in a project and team-oriented environment with teams spread across multiple sites, worldwide. May need to take the role of technical lead for a few of the components of the Test Environment and achieve high quality verification with a small team of verification engineers. The role offers ample scope to mentor junior engineers and interns and to enhance ones leadership skills. Key Qualifications and Experience Must have BSEE/ MSEE in EE with 5 to 8 years of relevant experience in the following areas: Verification of IP Cores or SoC Designs for Set Top Boxes, Mobile handsets, Smart Devices, etc. Knowledge of one or more of protocols: Ethernet/AMBA (AMBA2, AXI, CHI)/ SD/eMMC/USB/ DDR/PCIe MIPI/DSC. Knowledge of Ethernet protocol will be plus. Hands on experience with creating detailed design of components of Test Environment from Functional Specifications/ Test Environment Specifications. The TE must have used methodologies such as UVM, OVM Test Planning, Coverage Planning, Assertion Planning Hands on experience with System Verilog coding and Simulation tools; Deep Knowledge of OOPs Concepts Experience with Perforce or similar revision control environment Knowledge of Perl/Shell scripts. Exposure to quality processes in the context of IP design and verification is an added advantage In addition, the candidate should have good communication skills, will be a team player, and will have good problem-solving skills. Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, colour, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

The candidate will be part of the Static Verification team, a group of talented engineers dedicated to developing and enhancing platform for our static verification products. This team collaborates closely with other departments, including design, development, and customer support, to ensure seamless integration and execution. Together, the candidate will work on cutting-edge projects that push the boundaries of technology and contribute to the success of Synopsys and its customers. Person will work in platform team of static verification. Platform team provides support to various apps which are part of static verification. The hired candidate will provide features and support needed for successful deployment and ongoing business for apps of static verification. He might also work in developing GenAI application related to static platform. Technical competencies required for the role Strong hands-on experience in C/C++ based Object Oriented large and complex enterprise software development. Strong background in Design Patterns, Data Structure, Algorithms , and programming concepts. Well versed with Software Engineering and development processes. Experience with popular AI/ML frameworks (e.g., TensorFlow, PyTorch) is desirable. Experience with production code development on Unix/Linux platforms. Ability to develop new architectures and demonstrate strong leadership skills. Ability to troubleshoot, debug, and support software applications. Good analysis and problem-solving skills. 4+ years of software development experience. Preferable skills Experience in EDA/AI/ML research and development Exposure to Tcl, Python, Shell scripting and/or Vim Exposure to developer tools such as gdb, Valgrind,Visual Studio and Eclipse. Exposure with source code control tool like Perforce, Clearmake, CVS or Git . At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a visionary change leader passionate about ushering in a new era of digital finance. You possess a robust problem-solving ability, allowing you to diagnose functional needs and navigate ambiguity effectively. You have a knack for identifying current states and desired outcomes, developing blueprints and roadmaps to bridge the gap, and executing strategic plans. With a background in Finance, Business, or Technology Information Systems, you are well-versed in leveraging Anaplan for transformative planning and forecasting processes. You are flexible and collaborative, comfortable working with global teams across different time zones, and eager to contribute to high-impact projects. Your advanced financial modelling skills, strong understanding of business processes, and excellent communication abilities make you an ideal candidate for this role. What You'll Be Doing: Serving as the Model Builder SME for large-scale connected planning solutions. Gathering, analysing, and documenting business requirements. Translating business requirements into functional requirements and use cases. Converting existing solutions, spreadsheets, and business problems into sophisticated Anaplan multi-dimensional models. Modifying existing models as part of a connected solution, optimization, or to incorporate new functionality. Developing model documentation. Participating in data integration and migration solutions. Leading UAT testing and deployment efforts. Operating cross-functionally with some ambiguity, providing expertise to Strategy and FP&A teams on best practices for modelling and reporting. Building and developing Anaplan modules and lists based on model blueprints. Configuring and maintaining Anaplan lists, modules, dashboards, actions, and other model settings to meet business needs. Monitoring data flows to and from source systems to ensure all data is up-to-date and accurate. Performing root cause analyses and proposing solutions. Providing hands-on training to new end users on Anaplan models and documenting processes. Working closely with the Anaplan Solution Architect. The Impact You Will Have: Driving transformative change in Synopsys collaborative planning and forecasting processes. Enhancing the efficiency and accuracy of financial planning and reporting. Contributing to the global finance function's strategy, process, system, structural, and behavioural changes. Enabling better decision-making through sophisticated Anaplan models. Improving data integration and migration solutions to ensure accuracy and timeliness of financial data. Providing expertise and training to teams, fostering a culture of connected planning. What You'll Need: Bachelor's degree in finance, Business, Technology Information Systems, or equivalent. 3+ years of experience in operations or FP&A leveraging Anaplan, or completion of 3+ Anaplan implementation projects as a Model Builder. Certified Anaplan Model Builder, level 3 or higher. Experience with SAP Analytics Cloud is a plus. Advanced Microsoft Excel and financial modelling skills. Experience with multi-dimensional or cube-based planning and reporting tools. Strong understanding of business processes. Who You Are: Excellent written and verbal communication skills. Outstanding integrity, initiative, creativity, and passion. Proven record of career progression with increasing levels of responsibility. Experience in a fast-changing, fast-paced environment. Excellent teamwork skills, including the ability to interact with all organization levels. The Team You'll Be A Part Of: This opportunity sits within the Centre of Excellence's Transformation Team, focused on reshaping the future of Finance at Synopsys. The team drives strategy, process, system, structural, and behavioural change across the finance function, partnering with Synopsys leadership globally to drive transformative change in collaborative planning and forecasting processes. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 10383 Remote Eligible No Date Posted 07/04/2025 We are looking forManager to join Design Intent testing for our Signoff productsECO, PrimeClosure . This is an exciting opportunity to be part of engineering team to qualify tools with customer flows across the technology working closely with R&D, product engineers, field engineers and customers to solve complex technical challenges in the static timing analysis, design robustness, timing & power modeling, statistical analysis, ECO, extraction, and signal integrity analysis .. Through innovative techniques and ideas, you will help enable customers to accurately validate & use these features on their high-performance designs. Main responsibilities Mentor a team of engineers, set goals for the team, and drive for results. Will drive quality improvement effort by understanding customer design methodologies/flows and validating our tools to meet the required metrics before they are released to the customer. Perform in depth customer incoming root cause analysis to understand the product areas that need improvement and execute proactive testing to reduce customer issues by improving product quality. Identify opportunities to automate and find innovative solutions to improve productivity of teams. Work directly with R&D, Product Engineers, Field Engineers & customers to suggest improvements in Signoff and validation. Use in-depth product understanding to provide technical expertise , diagnose, troubleshoot issues. Key Qualifications The ideal candidate should have domain knowledge in timing, statistical analysis, front-end/back-end semiconductor manufacturing BSEE or equivalent, required with 10-12 years of experience , or MSEE. Synopsys tools like PrimeTime, Siliconsmart, NanoTime, PrimePower and Library Compiler experience is important, PD experience is a bonus. Exceptional debugging skills with good understanding of scripting languages. Experience with mentoring individuals is required. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

In this Role, you will be accountable for: Design and development of Transistor level analog and mixed signal layout. Device level floorplan, placement, routing, and physical verification. Troubleshoot Physical verification issues to get clean and desired results. In charge of creating and reviewing layout documents to ensure they meet quality standards and are delivered on time. Job Requirements: Candidate must have a bachelor's or master's degree and a minimum 5 years of experience in Analog and Mixed Signal Circuit Layout. Experience in Analog Layout Flow from Device placement till GDS release. Should be able to do planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment. Sound knowledge in Electrical and Electronic fundamentals. Solid Knowledge in Semiconductor device physics, good knowledge of CMOS, FINFET technologies. Knowledge of CMOS Fabrication technology and deep sub-micron effects and its impact on layout. Must know the Electro migration and other Reliability Concepts, ESD/LUP concepts and apply to layout. Hands on knowledge in EDA tools for Custom Mixed signal layout flows. Passionate to learn and explore new techniques. Must be self-directed, detail oriented with good problem-solving skills and communication skills. Effectively communicating with cross-functional team for successful project execution. Experience in Tcl is a plus . At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share

Category Engineering Hire Type Employee Job ID 10441 Remote Eligible No Date Posted 08/04/2025 Applications Engineer (AE) Alternate Job Titles: IP Applications Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: An experienced and passionate Applications Engineer, ready to join our dynamic team. You thrive in fast-paced environments and are driven by the opportunity to work with high-end customers in the Mobile Industry Processor Interface (MIPI) domain. With your strong technical background in ASIC design, you are adept at providing top-tier technical support and guidance. Your excellent communication skills enable you to effectively interact with customers and internal teams alike. You are not just looking for a job, but a place where you can make a significant impact and grow your career. What You'll Be Doing: Providing technical support to field engineers and customers utilizing Synopsys MIPI UFS Intellectual Property (IP) Partnering with high-tech customers through the full cycle of ASIC design, from installation and training to RTL design and production testing Conducting reviews on customers major SoC design milestones Authoring application notes and white papers to promote the IPs ease of use and address specific challenges Providing feedback to internal teams for continuous product improvements based on customer feedback Ensuring successful integration of Synopsys MIPI IP solutions into customers SoCs The Impact You Will Have: Enhancing customer satisfaction by providing expert support and ensuring seamless integration of Synopsys IP Driving innovation by collaborating with customers on cutting-edge SoC designs Contributing to the development of industry-leading IP solutions through continuous feedback and improvement processes Expanding Synopsys market presence in the MIPI domain through successful customer engagements Promoting the adoption of Synopsys IP by authoring impactful documentation and white papers Supporting the growth of Synopsys IP portfolio by identifying and addressing customer needs What You'll Need: Bachelor's degree with 5+ years or Master's degree with 2+ years of relevant experience in the ASIC design process Proficiency in Verilog HDL, synthesis, simulation, and verification Knowledge of Place and Route, Design Reuse, Physical Design, or Analog Design is a plus Familiarity with MIPI UFS/UniPro protocols, high-speed SERDES, or parallel interfaces is advantageous Experience with Synopsys tool suites is a plus Strong verbal and written communication skills in English Who You Are: An excellent communicator with the ability to interact effectively with customers and internal teams A problem solver who thrives in a dynamic environment A collaborative team player with a customer-centric approach Detail-oriented with strong analytical skills Passionate about technology and continuous learning The Team You'll Be A Part Of: You will join a dedicated and innovative Applications Engineering team, focused on supporting our customers in the Synopsys Intellectual Property (IP) domain. Our team is committed to excellence, working collaboratively to drive customer success and advance the capabilities of Synopsys IP solutions. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 10540 Remote Eligible No Date Posted 08/04/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and skilled R&D Engineer with a deep understanding of system verification. You are enthusiastic about developing cutting-edge verification solutions for high-performance computing, data centers, mobile/client devices, automotive systems, and IoT segments. Your experience in architecting and building SystemVerilog UVM-based verification components, coupled with your expertise in cache coherency protocols and functional verification, makes you an ideal candidate for this role. You are a team player with excellent problem-solving abilities, strong analytical skills, and a keen attention to detail. Your background in verification IP development and your programming prowess in languages like Perl, Python, and Shell scripting set you apart as a valuable asset to our team. What You'll Be Doing: Creating System verification solutions for Arm AMBA5 protocols such as CHI, AXI5/ACE5 for on-chip, chip-to-chip, die-to-die, coherent, and non-coherent design topologies. Responsible for functional verification involving coherent and non-coherent IP designs. Collaborating with market leaders in High Performance Computing, Data Centre, Mobile/Client, Automotive, and IoT segments to define and develop products that meet complex verification requirements. Architecting and building SystemVerilog UVM-based verification components, testbenches, checkers, scoreboards, and verification IPs. Developing verification plans and driving functional coverage-driven verification closure of real designs. Debugging and resolving issues in verification environments to ensure robust and reliable verification processes. The Impact You Will Have: Enhancing the reliability and performance of high-performance computing and data center systems through rigorous verification processes. Contributing to the advancement of mobile and client devices by ensuring the integrity and functionality of their verification protocols. Driving innovation in the automotive sector by developing robust verification solutions for automotive systems. Supporting the growth of IoT applications by providing reliable and efficient verification for IoT devices. Collaborating with industry leaders to shape the future of system verification and contribute to technological advancements. Ensuring the successful implementation and integration of verification IPs, thereby enhancing the overall quality of our products. What You'll Need: B.E/B.Tech in Electrical Engineering/Electronics & Communications Engineering with 5-8 years of relevant experience, OR M.E/M.Tech in VLSI Design/Microelectronics with 4-8 years of relevant experience. Hands-on experience in architecting and building SystemVerilog UVM-based verification components, testbenches, checkers, scoreboards, and verification IPs. In-depth understanding of cache coherency protocols such as Arm AMBA AXI/ACE, CHI; CCIX or CXL Cache. Experience in creating verification plans and achieving functional coverage-driven verification closure of real designs. Proficiency in writing scripts using Perl, Python, and Shell scripting. Who You Are: Excellent problem-solving, debugging, and analytical skills. Strong programming skills and familiarity with object-oriented programming concepts. Creative and innovative mindset. Excellent verbal and written communication skills. A collaborative team player with a passion for functional verification. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of AI and cloud infrastructure. Our Intelligent Connectivity Platform integrates PCIe , CXL , and Ethernet semiconductor-based solutions and the COSMOS software suite of system management and optimization tools to deliver a software-defined architecture that is both scalable and customizable. Inspired by trusted relationships with hyperscalers and the data center ecosystem, we are an innovation leader delivering products that are flexible and interoperable. Discover how we are transforming modern data-driven applications at www.asteralabs.com . As an Astera Labs Principal DFT (Design for Test) Engineer, you will be part of the DFT Design team that develops the next generation of Astera Labs connectivity products that support the world s leading cloud service providers and server and networking OEMs. In this role, you have exposure and be responsible for the full product life cycle, from definition to mass production to end of life of the products. You will be working closely with all engineering teams, physical design and functions like back-end testing, manufacturing, defect, and reliability analysis. This employee must be team oriented with a focus on solving problems in a collaborative manner between multiple engineering teams. Basic qualifications: Minimum of bachelor s degree in computer engineering/ electrical engineering, Masters preferred. Minimum 8+ years of experience in a semiconductor company as a DFT engineer Must be local or willing to relocate Required experience : Chip design, Verilog and System Verilog Verification, UVM methodology ATPG tools Scan insertion tools Gate-level simulations Static timing analysis Scripting (Perl/Tcl) Familiarity with ATE Hands-on expertise with commercial test generation tools for large complex designs Strong fundamental knowledge of DFT techniques include JTAG, ATPG, test pattern translation, yield learning, logic diagnosis, scan compression Experience running test compression software Experience using the Mentor Tessent or synopsys DFT Max and Tetramax tools Preferred experience: Experience with defining and implementing SOC level verification on large designs. Working with 93k Tester Experience with IEEE 1500 Standard or IEEE 1687 standard and MBIST, LBIST Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

You are an energetic, experienced, and organized writer passionate about cutting-edge technology. With a keen eye for detail and a knack for making complex topics accessible, you have honed your skills over 3-5 years in the software or hardware industry. Your proficiency with authoring tools like FrameMaker and Oxygen, combined with excellent problem-solving abilities, makes you a standout in your field. You excel in communication, both written and verbal, and thrive in a collaborative environment where you can work independently with minimal supervision. Your dedication to quality and your ability to learn new technologies quickly set you apart. You take pride in your work, care about others, and are committed to doing a good job. Familiarity with semiconductor design flows and tools such as Structured FrameMaker, Oxygen editor, and XML flows is a plus. What You ll Be Doing: Plan, organize, write, and edit various types of customer documentation. Collaborate with world-class engineers to create essential customer documentation in dynamic formats. Empower customers to design-in and optimize Synopsys products through clear, concise documentation. Translate complex technical information into user-friendly content. Ensure documentation meets industry standards and is easily accessible to global customers. Continuously update and maintain documentation to reflect product updates and new features. The Impact You Will Have: Enhance customer satisfaction by providing clear and comprehensive documentation. Facilitate the adoption and optimization of Synopsys products by global customers. Contribute to the overall success of Synopsys by ensuring high-quality documentation. Support the development of innovative solutions through effective communication. Help maintain Synopsys reputation as a leader in semiconductor IP and EDA software. Drive continuous improvement in documentation processes and standards. What You ll Need: Degree or masters in electronics, science, hardware, computing, software, physics, mathematics, or engineering discipline. Other technical disciplines also considered. 3-5 years of technical writing experience in the software or hardware industry. Excellent problem-solving skills and strong logical reasoning. Proficiency with authoring tools such as FrameMaker and Oxygen. Exceptional English writing and speaking skills. Who You Are: Excellent communication and interpersonal skills. Energetic and capable of learning new technologies as necessary. Team player who can work independently with minimal supervision. Detail-oriented and committed to producing high-quality work. Proactive and takes ownership of projects and tasks

As a Logic design Engineer in the IBM Systems division, you will be responsible for the microarchitecture design and development of features to meet Secure, high performance & low power targets of the Mainframe and / or POWER customers. Deep expertise in the implementation of functional units within the core / cache / Memory controller / Interrupt / crypto / PCIE / DLLAdditional responsibilities:logic (RTL) design, timing closure, CDC analysis etc.Understand and Design Power efficient logic.Agile project planning and execution.Masters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high performance secure system performance. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Minimum 5+ years of experience in Chip design and development. Understand CPU / GPU / RISC V architectures. Expertise in one of the architecture and design of Core units (Fetch, Decode, arithmetic units -adders, multipliers, L1/L2/L3 cache , Mem , IO ) Understand RISC V core Experience with VLSI Design in VHDL / Verilog

As a Logic design lead in the IBM Systems division, you will be responsible for the microarchitecture design and development of features to meet Secure, high performance & low power targets of the Mainframe and / or POWER customers. Deep expertise in the implementation of functional units within the core / cache / Memory controller / Interrupt / crypto / PCIE / DLL Additional responsibilities: logic (RTL) design, timing closure, CDC analysis etc. Understand and Design Power efficient logic. Agile project planning and execution. Masters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high performance secure system performance. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Minimum 8+ years of experience in Chip design and development. Understand CPU / GPU / RISC V architectures. Expertise in one of the architecture and design of Core units (Fetch, Decode, arithmetic units -adders, multipliers, L1/L2/L3 cache , Mem , IO ) Understand RISC V core Experience with VLSI Design in VHDL / Verilog

NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel. NVIDIA is a learning machine that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life s work , to amplify human creativity and intelligence. As an NVIDIAN, you ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join our diverse team and see how you can make a lasting impact on the world! Design-for-Test Engineering at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification, and post-silicon validation on some of the industrys most complex semiconductor chips. What youll be doing: As an integral member in our team, you will work on exploring Applied AI solutions for DFX and VLSI problem statements. Architect end-to-end generative AI solutions with a focus on LLMs, RAGs Agentic AI workflows. Work on deploying predictive ML models for efficient Silicon Lifecycle Management of NVIDIAs chips. Collaborate closely with various VLSI DFX teams to understand their language-related engineering challenges and design tailored solutions. Partner closely with cross-functional AI teams to provide feedback and contribute to the evolution of generative AI technologies. Work closely with DFX teams to integrate Agentic AI workflows into their applications and systems and stay abreast of the latest developments in language models and generative AI technologies. Define how data will be collected, stored, consumed and managed for next-generation AI use cases. You will also help mentor junior engineers on test designs and trade-offs including cost and quality. What we need to see: BSEE or MSEE from reputed institutions with 2+ years of experience in DFT, VLSI Applied Machine Learning Experience in Applied ML solutions for chip design problems Significant experience in deploying generative AI solutions for engineering use cases Good understanding of fundamental DFT VLSI concepts - ATPG, scan, RTL clocks design, STA, place-n-route and power Experience in application of AI for EDA-related problem-solving is a plus Excellent knowledge in using statistical tools for data analysis insights Strong programming and scripting skills in Perl, Python, C++ or TCL desired Strong organization and time management skills to work in a fast-pace multi-task environment Self-motivated, independent, ability to work independently with minimal day-to-day direction Outstanding written and oral communication skills with the curiosity to work on rare challenges NVIDIA offers highly competitive salaries and a comprehensive benefits package. We have some of the most brilliant and talented people in the world working for us and, due to unprecedented growth, our world-class engineering teams are growing fast. If youre a creative and autonomous engineer with real passion for technology, we want to hear from you! #LI-Hybrid

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It s a unique legacy of innovation that s fueled by great technology and amazing people. Today, we re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what s never been done before takes vision, innovation, and the world s best talent. As an NVIDIAN, you ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. As part of the CAD team our engineers develop and support tools for all of NVIDIAs semiconductor products. In addition, they also develop in-house tools in the area of Design for Test (DFT) and Design for Power (DFP) using C++, Python, and TCL. Below are some of the some of the teams activities. We are a diverse team needing someone who is not afraid of a challenge. If this is you, come join us today. What you ll be doing: Develop CAD software for high performance chip design and verification. Develop design and verification methodology for VLSI. Work on next generation software infrastructure for scalable development. Deploy AI into our work flows What we need to see: BS or Master degree of Electrical Engineering/Computer Engineering/Computer Science or equivalent experience 2+ years of relevant work experience. Skill of script language, such as Python/Perl/TCL. Software engineering: software design, algorithms, and QA. Familiar with C++ is a plus. Ways to stand out from the crowd: Familiar with Verilog. Experiences in CAD software developments. Knowledge or experience with DFT, DFP is a plus. Familiar with Verilog, VLSI and ASIC design principles, including knowledge of logic cells. Knowledge of GenAI, LLM, AI Code Generation is a plus. NVIDIA is widely considered to be one of the technology world s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. Are you a creative and autonomous engineer who loves a challengeCome join our GPU Verification team and help us build future interconnect architectures that will continue to drive us forward in the fields of High Performance Computing, Graphics and AI. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation. #LI-Hybrid

You are a seasoned Full Stack Engineer with a passion for developing innovative software solutions. With a strong background in both front-end and back-end technologies, you thrive in dynamic environments where you can leverage your expertise to drive impactful projects. You possess a deep understanding of modern UI technologies such as React, Node.js, and Bootstrap, paired with robust programming skills in HTML, JavaScript, and CSS. Your proficiency in Java or Python, combined with a solid grasp of RDBMS concepts and SQL, makes you a versatile asset to any team. Your ability to quickly adapt to new technologies and understand user interactions allows you to create intuitive and efficient user experiences. You are a collaborative team player who excels in cross-functional environments, bringing alignment on goals and ensuring high-quality software development and deployment. Your experience with enterprise message buses like Kafka and backend database technologies such as Redis, MongoDB, and ElasticSearch is a strong plus. You are driven by the desire to continuously learn and contribute to the success of cutting-edge projects. What you'll Be Doing: Implement new features and corresponding UI pages in nightly regression results tracking and visualization tool. Develop new dashlets in the R&D Dashboard to make it a one-stop portal for all quality/tracking data. Collaborate with the team to port existing UI applications to a new architecture currently under development. Work with the team to implement features and new UI widgets in a homegrown UI framework/library. Ensure software gets developed and deployed on-time with high quality. Quickly learn and adapt to new technologies introduced as part of future initiatives. The Impact You Will Have: Improve the quality and productivity of EDA products. Enhance the development of profiling and telemetry solutions scalable across Synopsys product portfolios. Ensure the timely delivery of high-quality software solutions. Drive innovation in software engineering practices and technologies. Contribute to the alignment of goals across teams and organizations. Shape the future of software development in high-tech environments. What you'll Need: Bachelors or Masters degree in computer science, engineering, or a related field. 3 to 8 years of experience in software/application development. Strong programming skills in HTML, JavaScript, and CSS. Proficiency in modern UI technologies such as React, Node.js, Bootstrap, and JQuery. Must have strong programming skills in either Java or Python. Must have a strong understanding of RDBMS concepts and a solid working knowledge of SQL. Candidate should also have the aptitude for understanding user interactions and adjusting the UX based on the user-flows. Working knowledge of enterprise message bus such as Kafka is a strong plus