BITSILICA - Verification Engineer - SoC/GLS

Key Responsibilities

• Develop comprehensive verification plans and strategies for SoC and GLS components.
• Design, implement, and maintain reusable testbenches using SystemVerilog and UVM methodologies.
• Perform functional verification of AMBA bus protocols including AXI, AHB, and APB.
• Collaborate with RTL designers and architects to understand specifications and implement verification environments accordingly.
• Analyze verification results, debug issues, and provide timely resolutions to meet project timelines.
• Ensure coverage goals are met through simulation and formal verification techniques.
• (Optional) Participate in DSP module verification to enhance verification scope.
• Mentor junior engineers and contribute to process improvements within the verification team.
  

Required Skills & Qualifications

• 5 to 10 years of experience in SoC and GLS verification in a semiconductor environment.
• Strong proficiency in SystemVerilog, UVM, and C programming for verification purposes.
• Extensive experience with AMBA protocols (AXI, AHB, APB) and bus functional modeling.
• Good understanding of DSP modules and verification (preferred but not mandatory).
• Experience with simulation tools like Questa, VCS, or similar.
• Strong analytical, debugging, and problem-solving skills.
• Excellent communication and teamwork skills, with the ability to work effectively in a collaborative environment.
• Bachelors or Masters degree in Electronics, Computer Science, or related engineering discipline.