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Asic Verification Engineer

5 - 10 years

20 - 35 Lacs

Pune Bengaluru

Posted:15 hours ago| Platform: Naukri logo

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Skills Required

SV Arm Core Debugging ARM Processor UVM Gls

Work Mode

Work from Office

Job Type

Full Time

Job Description

Hiring Now: Design Verification Engineers (Multiple Openings)

Bangalore & Pune

Current Openings

1 Senior Design Verification Engineer 10+ Years (Bangalore) – 1 Position

  • Strong expertise in

    SystemVerilog (SV)

    and

    UVM-based verification

  • Mandatory

    : Experience with

    ARM Coresight Debug subsystem

  • Strong debugging and problem-solving skills

2 Design Verification Engineer – 5+ Years (Bangalore) – 2 Positions

  • Proficient in

    SystemVerilog (SV)

    and

    UVM

  • Preferred

    : ARM Coresight Debug subsystem knowledge
  • Strong debugging expertise required

3 Design Verification Engineer – 8+ Years (Bangalore) – 2 Positions

  • Solid experience with

    SV and UVM

  • Mandatory

    :

    CSI/DSI Protocol

    knowledge
  • Excellent debugging capabilities

4 Design Verification Engineer – 8+ Years (Pune Preferred / Bangalore) – 2 Positions

  • Expertise in

    SystemVerilog (SV)

    and

    UVM

  • Mandatory

    : Experience with

    Memory Controller or Cache

  • Strong debug experience is essential

Why Join ACL Digital?

  • Work on cutting-edge SoC & IP designs with global semiconductor leaders
  • Opportunity to contribute across leading technology nodes
  • Fast-paced, innovation-driven culture with career growth opportunities

prabhu.p@acldigital.com

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