Asic Verification Engineer

Acesoft Labs

5 - 10 years

6 - 16 Lacs

hyderabad

Posted:1 day ago| Platform:

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Skills Required

scoreboard implementation verilog and systemverilog functional coverage coding uvm assertions test plan creation axi rtl debugging code coverage analysis ip/block/subsystem level verification testbench development

Work Mode

Work from Office

Job Type

Full Time

Job Description

Job Title:

ASIC Verification Engineer

Experience Required:

5+ Years

Roles & Responsibilities:

Be part of a
highly skilled ASIC team
working on cutting-edge technology nodes.
Responsible for
end-to-end IP/Block and Subsystem-level verification
from test plan creation,
SystemVerilog/UVM testbench development
, to
verification signoff
.
Ensure
first-pass silicon success
through comprehensive verification coverage, including
mixed-mode verification
.
Collaborate with domain experts across
global locations
to drive technical initiatives and verification strategies.

Mandatory Skills Required:

Expertise in
IP/Block/Subsystem-level verification
.
Strong understanding of
AMBA protocols
: APB, AHB, AXI.
Proven ability in
building test plans, UVM environments, and testbenches
.
Proficient in
RTL debugging
, developing
scoreboards
, writing
assertions
, and implementing
functional and code coverage
.
Solid knowledge of
Verilog
and
SystemVerilog
.
Strong
written and verbal communication
skills.
Ability to work effectively in
cross-functional
and
globally dispersed teams
.

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