683 Asic Design Jobs - Page 7

Role Overview: You will be responsible for leading the architecture, design, and verification of digital blocks for mixed-signal ASICs. Your role will involve collaborating closely with Analog and System teams, guiding RTL design, optimizing power, performance, and area, and contributing to IP reuse strategy and design methodology improvements. Additionally, you will provide technical leadership across cross-functional teams and support post-silicon validation. Key Responsibilities: - Lead the architecture, design, and verification of digital blocks for mixed-signal ASICs - Collaborate closely with Analog and System teams to define specifications and ensure seamless integration - Drive RTL d...

Meet the Team Join the Cisco Silicon One team in developing a unified silicon architecture for web-scale and service provider networks. Cisco''s silicon team provides an outstanding, unique experience for ASIC engineers by combining the resources offered by a sizable multi-geography silicon organization and a large campus (with an on-site gym, healthcare, caf, social interest groups, and philanthropy) with the startup culture and breadth of growth opportunities that working in a smaller ASIC team can provide. Your Impact Write micro-architecture specifications and participate in reviews. Implement Verilog RTL to meet timing, performance, and power requirements. Contribute to full chip integr...

Asic Design Engineering Manager Responsibilities Manage an ASIC design team responsible for various processing blocks in a SOC. Drive RTL design planning and execution, innovative design methodology development, u-Arch, IP design and SOC integration. Participate in silicon architecture, interface with Architecture, SW/FW, Design, Modelling, Emulation, and Post-Silicon Validation teams Partner with internal and external cross-functional teams, across all levels of a corporation, from executives, team managers and individual contributors including development engineers, capacity planners and supply chain experts Contribute to and drive development of and maintain overall silicon strategy align...

We are looking for a skilled professional with 05-20 years of experience to join our team as a Design Verification Engineer in Bangalore, Hyderabad, Kochi, and Pune. The ideal candidate will have a strong background in VLSI design verification. Roles and Responsibility Develop and implement functional specifications for IPs, subsystems, and SOCs. Review and revise system designs using System Verilog and UVM. Perform RTL simulations using Synopsys and Cadence simulators. Create and verify UPF models. Collaborate with cross-functional teams to ensure successful project execution. Analyze and debug complex design issues. Job Requirements Strong knowledge of System Verilog, UVM, and RTL simulati...

We are looking for a skilled ASIC RTL Engineer with 5-9 years of experience to join our team in Bengaluru, Hyderabad, Chennai, Pune, Kochi, and Ahmedabad. The ideal candidate will have expertise in IP RTL design targeted for SOC, Static checks, some basic protocols, Low power, Micro Architecture, SoC subsystem/IP design, interface protocols, and scripting languages like Make flow, Perl, shell, and Python. Roles and Responsibility Design and develop high-quality ASIC RTL code for various applications. Collaborate with cross-functional teams to ensure seamless integration of RTL designs into larger systems. Perform static checks on RTL designs to ensure compliance with industry standards and b...

We are looking for a skilled Technical Manager with 10+ years of experience to lead our Chip Design Front End team in Bangalore. The ideal candidate will have a strong background in project management, digital design, verification, and synthesis, as well as experience with EDA tools. Roles and Responsibility Manage front-end stages of semiconductor chip design projects. Lead technical teams to achieve project goals and objectives. Develop and implement project plans and schedules. Coordinate with cross-functional teams to ensure successful project execution. Identify and mitigate risks associated with chip design and development. Ensure compliance with industry standards and best practices. ...

We are looking for a skilled Design Verification Engineer with 6 to 11 years of experience. The ideal candidate will have expertise in System Verilog and UVM, PCIe, Ethernet, and solid Linux environment skills. This position is available in Bangalore, Hyderabad, and Ahmedabad. Roles and Responsibility Develop and implement verification environments using System Verilog and UVM. Verify IP, SOC, and pre-silicon designs. Collaborate with cross-functional teams to identify and resolve design issues. Create and maintain testbenches and testcases for verifying complex digital circuits. Analyze and debug verification results to ensure design quality. Participate in the development of new verificati...

Role & responsibilities Preferred candidate profile Digital Design Engineer Technical Skills • Must-Have: • Proven experience in RTL coding and RTL integration of sub-blocks into larger components • Strong expertise in RTL linting debug and error/warning fixes using VcSpyglass • Deep knowledge in analyzing and resolving CDC/RDC violations using Questa • Solid understanding of clocking and reset concepts, including synchronization, generation, and division • Nice-to-Have: • Familiarity with memory subsystems, Tensilica DSP cores and/or communication/control peripheral bus systems • Understanding of on-chip interconnect structures such as Arteris FlexNoC and AMBA protocols • Basic knowledge of...

We Are: At Synopsys, we drive the innovations that shape the way we live and connect Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation You Are: You are a visionary engineering leader with a passion for driving innovation in System-on-Chip (SoC) design and integration You thrive on solving complex challenges and possess a deep understanding of RTL design, verification, and signoff methodologies Your extensive experience in the...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

We are seeking an exceptional Senior Physical Design Engineer to take a key role in our semiconductor design team. As a Senior Physical Design Engineer, you will lead the development and implementation of cutting-edge physical design methodologies and flows for complex ASIC designs. You will collaborate closely with cross-functional teams to ensure the successful delivery of high-quality designs Key Responsibilities Perform Synthesis, floor planning, placement, Clock, routing, and PPA optimization for High Speed Advance ASICs. Define and drive physical design strategies to meet aggressive performance, power, and area targets. Conduct detailed analysis of timing, power, and area, and drive de...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Experience: 10+ years - Should have worked hands-on extensively on full chip DFT design, implementation, vector generation/verification, JTAG, boundary scan and simulation. -Experience with Scan, Compression, ATPG and simulations with Mentor/Synopsys/Cadence tools. Logic BIST knowledge is a plus. - Should have participated in successful tapeouts ofSoC/ASIC chips at 14nm or below and achieved test targets. - Descent understanding of front-end SoC/ASIC design and implementation including Synthesis and STA. -Develop/automate flows and scripts in Perl/Tcl to enhance the DFT methodologies & process -Excellent problem solving and debugging skills. Proactive in nature -Leading junior teams, Mentori...

- Should have worked hands-on ASIC DFT design, implementation, vector generation/verification, JTAG, boundary scan and simulation. -Experience with Scan, Compression, ATPG and simulations with Mentor/Synopsys/Cadence tools. Logic BIST knowledge is a plus. - Should have participated in successful tapeouts ofSoC/ASIC chips at Lower nodes ; 14nm or below and achieved test targets. - Descent understanding of front-end SoC/ASIC design and implementation including Synthesis and STA. -Develop/automate flows and scripts in Perl/Tcl to enhance the DFT methodologies & process -Excellent problem solving and debugging skills. Proactive in nature - Excellent Customer interaction, Communication and Team w...

Minimum qualifications: Bachelors degree in Electrical/Computer Engineering or equivalent practical experience 3 years of experience with Register-Transfer Level (RTL) design and integration using Verilog/System Verilog, microarchitecture and automation Experience with RTL design using Verilog/System Verilog and microarchitecture Experience with a scripting language like Python or Perl Preferred qualifications: Master's degree in Computer Science or Electrical Engineering 6 years of industry experience with IP design Experience with methodologies for low power estimation, timing closure, and synthesis Experience with methodologies for RTL quality checks (e-g , Lint, CDC, RDC) About the jobBe...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

About The Role Your Role As a SoC GLS Verification Engineer , you will play a key role in verifying complex SoC designs through Gate-Level Simulation (GLS). You will work closely with design and verification teams to ensure functional correctness, timing accuracy, and overall quality of silicon-ready designs. Your expertise in GLS methodologies and debugging will be critical in delivering high-performance, reliable SoCs. In this role, you will: Perform GLS using Zero Delay , SDF , and Post-Layout GLS (PAGLS) techniques. Debug and resolve issues in gate-level simulations to ensure timing and functional correctness. Develop and maintain SystemVerilog/UVM testbenches for GLS environments. Colla...

Develop and maintain formal equivalence checking flows using Synopsys Formality. Collaborate with cross-functional teams to align verification methodology with design goals. Implement and support Formality ECO flows for incremental synthesis. Drive methodology improvements for SoC design verification. Coordinate with internal stakeholders and external vendors to deliver high-quality solutions. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Bachelor’s or Master’s degree in Computer Science, Electronics Engineering, or VLSI Design. 5–8 years of hands-on experience with Synopsys Formality or similar tools (e.g., Cadence Con...

Role Overview: You will be responsible for leading Emulation & FPGA prototyping and verification for complex SoCs/ASICs. This role will involve RTL/testbench development, lab bring-up, debugging, and close collaboration with design, software, and verification teams to ensure robust pre-silicon validation and hardware-software integration. Key Responsibilities: - Develop and implement verification strategies using Emulation & FPGA prototyping platforms. - Create and maintain RTL/testbenches aligned with ASIC designs. - Lead lab bring-up, debug HW/SW interactions (JTAG, UART, analyzers). - Collaborate with software/ASIC teams for seamless integration and firmware readiness. - Design architectu...

As a Systems Engineer at Qualcomm India Private Limited, you will be joining the Engineering Group to analyze and evaluate GPU architecture and microarchitecture for optimizing performance and power consumption. Your responsibilities will include GPU power modeling, workload analysis, and developing tests for pre-silicon and post-silicon power verifications. You will work closely with RTL designers, architects, verification specialists, compilers, drivers, silicon implementation teams, and post-silicon teams. Knowledge of Graphics architecture is considered advantageous for this role. Key Responsibilities: - Analyze and evaluate GPU architecture and microarchitecture - Optimize performance a...

Meta is seeking an Engineering Manager to join our Silicon Enablement team. Our servers and data centers are the foundation upon which our rapidly scaling infrastructure operates efficiently to deliver our innovative services. The Silicon Enablement team is responsible for the Hardware Lifecycle of all Meta servers including pre-production hands-on system and hardware debugging and stress testing, enabling production-ready system monitoring, automated provisioning and automated remediation of issues.The Silicon Enablement team work closely with hardware designers, system manufacturers, component vendors, capacity engineering, production engineering, Meta services, and data center operations ...