190 X86 Jobs - Page 5

Job Description Summary The u2018Linux System Developer contributes to GE Vernova community primarily responsible for design develop test and release of Predix Edge Operating System build that controls and runs on Grid Vernova products. Integrates Yocto distributions Edge features and associated extensions that are tailored for different hardware platforms ensuring design and quality compliance of GE Vernova products and services impacts quality efficiency and effectiveness of own team impacts approaches projects programs in the functional area or affected business organization and ways of working which has significant input into priorities Job Description Major Responsibilities: Design common architecture for EDGE operating system with micro services / docker support and advanced EDGE features for cyber-secure Non-Real-Time and Real-Time solutions. Work closely with EDGE customers to define quality operating system technical and integration specifications architectural constraints and system performance needs and integrate specific Linux/Kernel infrastructure and any third-party drivers in their software stacks to ensure the final solution meets the end user demands. Maintain and support Yocto build system using CI/CD including packaging and deployment of software images. Hands-on design and development to support feasibility technology stack and deployment needs. Support end-users / design teams in implementation of the platform. Identify and manage technical risks. Facilitate an open-source collaboration model within GA and the larger GE to advance CSP development. Ensure high quality platform software outputs. Hands-on with GE Vernova recommended software development methodologies tools (e. g. CI/CI) and metrics. Basic Qualifications: Minimum 8 years hands-on experience as a software architect / linux system developer. Experience developing under Linux OS with EDGE OS and Controls Software Platform is preferred. Good understanding of software container micro services dockers and orchestration technologies. Hands-on experience with Yocto projects tools and Linux recipes build and integration. Experience developing for real-time control system applications. Good understanding of DevOps tools and CI/CD/CM tools. Strong people and communication skills - experience with cross-team collaboration. Ability to articulate and present technology market trends and project status. Desired: Working experience in cloud technologies and edge devices communication interfaces and protocols. Familiarity with ARM and X86 hardware platforms. Basic understanding of cyber security principles and secure software development processes. Working experience in cross-functional distributed global agile teams in a large global company. Knowledge of hypervisors and KVMs. Device driver development knowledge for kernel and user modules. Additional Information Relocation Assistance Provided: Yes

About Us: Tessolve offers a unique combination ofpre-silicon and post-silicon expertise to provide an efficient turnkey solutionfor silicon bring-up, and spec to the product. With 3200+ employees worldwide,Tessolve provides a one-stop-shop solution with full-fledged hardware andsoftware capabilities, including its advanced silicon and system testing labs. Tessolve offers a Turnkey ASIC Solution,from design to packaged parts. Tessolve s design services include solutions onadvanced process nodes with a healthy eco-system relationship with EDA, IP, andfoundries. Our front-end design strengths integrated with the knowledge fromthe backend flow, allows Tessolve to catch design flaws ahead in the cycle,thus reducing expensive re-design costs, and risks. We actively invest in theRD center of excellence initiatives such as 5G, mmWave, Silicon photonics,HSIO, HBM/HPI, system-level test, and others. Tessolve also offers end-to-endproduct design services in the embedded domain from concept to manufacturingunder an ODM model with application expertise in Avionics, Automotive,Industrial and Medical segments. Tessolve s Embedded Engineering servicesenable customers a faster time-to-market through deep domain expertise,innovative ideas, diverse embedded hardware software services, andbuilt-in infrastructure with world-class lab facilities. Tessolve s clientele includes Tier 1clients across multiple market segments, 9 of the top 10 semiconductorcompanies, start-ups, and government entities. We have a global presence over12 countries with office locations in the United States, India, Singapore,Malaysia, Germany, United Kingdom, Canada, UK, Japan, Taiwan, Philippines, andTest Labs in India, Singapore, Malaysia, Austin, San Jose. For more details, visit www.tessolve.com . Job Overview Brief description about the Job. Job Location : Electronic -City, Phase II,Bangalore. What you ll do Development Testing of IO controller hub diagnostic test cases forAMD SoCs Debugging of the test case failures and reporting them to the designteam Involvement in test planning of diagnostics Collaboration with various related cross-teams Who you are Expertise in C++ programming Post Silicon diagnostics development validation Good understanding of data/address busarchitecture, caches, memory management. Understanding of PC Hardware, SoC, Chipsets,CPU, GPU, BIOS, firmware etc. Knowledge of x86 / computer architecture Understanding of OS internals Solid knowledge of software development lifecycle Strong analytical and problem-solving skills Tessolve Semiconductor Private Limited, aswell as its affiliates and subsidiaries ( Tessolve ) does not requirejob applicants to make any payments at any stage of the hiring process. Anyrequest for payment in exchange for a job opportunity at Tessolve is fraudulentand should be ignored. If you receive any such communication, we stronglyadvise you to refrain from making any payments and to promptly report theincident to us at hr@tessolve.com. Tessolve is not responsible for any lossesincurred due to such fraudulent activities

We are looking for a dynamic, energetic Software Systems Design Engineer to join our growing team. As a key contributor to the success of AMD s products, you will be part of a leading team to drive and improve AMD s abilities to deliver the highest quality, industry-leading technologies to market. The Software Systems Design Engineering team fosters and encourages continuous technical innovation to showcase successes as we'll as facilitate continuous career development. THE PERSON: As a Software Systems Design Engineer, you will be responsible for increasing performance optimization of applications running on AMD hardware. In this high visibility position, your systems engineering expertise will be necessary to define products, develop solutions, assess root causes, and produce solution resolutions. As a senior member of the team, taking initiative in mentoring to achiev e the team s goal of on time delivery is expected. KEY RESPONSIBILITIES: Drive technical innovation to improve AMDs capabilities across product development and validation, including software tools and script development, technical and procedural methodology enhancement, and various internal and cross-functional initiatives . C onvert feature specifications into test cases (manual and automated) that will cover several types of testing - boundary, negative, functional, etc W ork with multiple teams and tracking test execution to make sure all features are validated and optimized on time . W ork closely with supporting technical teams to validate new software features and new OS (Operating System) introduction . Le ad collaborative approaches with multiple teams . M entor others to achieve integrated projects . PREFERRED EXPERIENCE: C++ Programming experience is a MUST x86-64 Architecture knowledge Python or any scripting language knowledge is added advantage Debug techniques and methodologies . Good knowledge and hands on experience in PC (Personal Computer) configurations (both Software and Hardware) with methods of Troubleshooting . Proven work on Windows and Linux operating systems . Knowledge of system architecture, technical debug, and validation strategies . Detailed oriented; ability to multitask through planning/organizing. Excellent Communication and Presentation skills . ACADEMIC CREDENTIALS: Bachelors or masters degree in electrical or computer engineering . masters degree preferred.

If Intrested !!!! Please Fill the below details and share your updated resume to nancy.sylvia@ilinktalent.org Name: Mobile num: Email id: Current company: Total years of experience: Relevant years of experience: Current CTC: Expected CTC: Current location: Preferred location: Notice period: If immediate joiner - Last working date: Role & responsibilities Windows driver development - Job description: Looking for 3-5 years experienced Windows Device Driver Developer with strong C & C++ programming skills and in-depth knowledge of Windows driver development for Windows 11 and previous versions. The role requires working with WDM and WDF frameworks and developing and debugging drivers for x86 / ARM64 architecture. The candidate should also be comfortable with local and remote debugging. The current requirement is to develop a Windows driver for an AI Accelerator card (NPU) for neural network processing. Responsibilities include: Design, develop, and debug Windows device drivers using WDM and WDF frameworks. Perform remote debugging and troubleshoot drivers effectively, utilizing tools to ensure high performance and stability. Collaborate with hardware teams to ensure proper integration and performance of drivers on given (x86_64/ARM64) architecture. Apply knowledge of system registers in ARM and handle other low-level architecture-specific tasks. Skills Required: Proficiency in C and C++ Strong experience with WDM, WDF, UMDF, KMDF Windows 11 driver development expertise Strong debugging skills, including remote debugging of Windows drivers Very strong in developing PCIe based Windows device drivers and well equipped, comfortable with PCIe protocol specifications. Ability to port the driver functionality, and features from other OS to Windows Good understanding of x86_64/ARM64 architecture and system registers Excellent problem-solving abilities, attention to detail, and quality deliverables Preferred experience Previous experience working with cross-functional teams on HW & SW integration. Signing of kernel modules and deployment. Experience with version control systems (e.g., Git) and modern software development practices. Linux and/or other OS/RTOS device driver experience.

Emulation Verification Engineer in Pune, MH, India Description By providing a new level of predictable performance, efficiency, and sustainability Ampere is working with leading cloud suppliers and a growing partner ecosystem to deliver cloud instances, servers and embedded/edge products that can handle the compute demands of today and tomorrow. Join us at Ampere and work alongside a passionate and growing team we d love to have you apply. Come invent the future with us. About the role: As a part of the Emulation Team at Ampere, you will be part of verification of the next generation of microprocessor cores on hardware emulation platform by developing and deploying new capabilities and test content to accelerate bug finding in pre-silicon. In this role, you will be at the forefront of AI innovation, building AmpereOne Aurora, our groundbreaking AI compute solution. Aurora combines high-performance general-purpose CPUs with integrated AI capabilities, offering a compelling combination of efficiency and market reach. This revolutionary product is poised to deliver superior performance while consuming significantly less power. Design Verification is an integral part of the chip design process that ensures our customers get the absolute highest quality products that meets their functional and performance requirements. The Emulation Team at Ampere Computing comprises of stellar folks who have dedicated themselves to the art and fun of design verification. We are a tight knit, fast-paced team who work extremely closely with our design and architecture partners to ensure no bug is left behind. What youll achieve: Your responsibilities may include, but are not limited to, the following: Be part of the emulation verification execution team and be responsible for planning, development, and execution of test content in varied domains including system stress. Work in collaboration with design and architecture teams to root-cause failures using advanced debugging techniques. Develop high quality emulation test plans comprising of BareMetal content and OS based content for flushing even the most corner-case bugs. Create emulation models from RTL to run test content, using industry standard emulation platform technology. Review architecture and microarchitecture specs and influence design/microarchitecture decisions Partner with emulation vendor to debug and quickly resolve blocking issues in the emulation technology as required Verify performance and functionality of GPU/AI hardware , drivers, features ,application and tools. About you: M.Tech in Electronics Engineering or Computer Engineering with 3+ years of semiconductor experience or B.Tech in Electronics Engineering or Computer Engineering with 5+ years of semiconductor experience Knowledge about AI processor/GPU architecture , Linux systems development and memory consistency models in AArch64 and/or x86 and concurrency. Knowledge about GPU Stress and functional test development. Experience in GPU compute programming or parallel programming. Demonstrated ability to rapidly learn new technologies and apply them effectively. Experience developing bare-metal content using C/C++ and assembly language for verification. ARM assembly expertise preferred. Experience with Linux kernel development, device drivers and user space programming, FW development and debugging Experience in one of the protocols in preferred - Ethernet/USB/SATA/LPDDR/HBM. Experience debugging failures using innovative debug practices and familiarity with tools such as Verdi to debug RTL issues. Working experience with emulation technology of Zebu, Palladium or Mentor Veloce is strongly recommended. What we ll offer: At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, bonus (i.e., variable pay tied to internal company goals), long-term incentive, and comprehensive benefits. Benefits highlights include: Premium medical, dental, vision insurance, parental benefits including creche reimbursement, as well as a retirement plan, so that you can feel secure in your health, financial future and child care during work. Generous paid time off policy so that you can embrace a healthy work-life balance Fully catered lunch in our office along with a variety of healthy snacks, energizing coffee or tea, and refreshing drinks to keep you fueled and focused throughout the day. And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are passionate about inventing industry leading cloud-native designs that contribute to a more sustainable future. We are excited to share more about our career opportunities with you through the interview process.

Emulation Verification Engineer in Bangalore, KA, India Description By providing a new level of predictable performance, efficiency, and sustainability Ampere is working with leading cloud suppliers and a growing partner ecosystem to deliver cloud instances, servers and embedded/edge products that can handle the compute demands of today and tomorrow. Join us at Ampere and work alongside a passionate and growing team we d love to have you apply. Come invent the future with us. About the role: As a part of the Emulation Team at Ampere, you will be part of verification of the next generation of microprocessor cores on hardware emulation platform by developing and deploying new capabilities and test content to accelerate bug finding in pre-silicon. In this role, you will be at the forefront of AI innovation, building AmpereOne Aurora, our groundbreaking AI compute solution. Aurora combines high-performance general-purpose CPUs with integrated AI capabilities, offering a compelling combination of efficiency and market reach. This revolutionary product is poised to deliver superior performance while consuming significantly less power. Design Verification is an integral part of the chip design process that ensures our customers get the absolute highest quality products that meets their functional and performance requirements. The Emulation Team at Ampere Computing comprises of stellar folks who have dedicated themselves to the art and fun of design verification. We are a tight knit, fast-paced team who work extremely closely with our design and architecture partners to ensure no bug is left behind. What youll achieve: Your responsibilities may include, but are not limited to, the following: Be part of the emulation verification execution team and be responsible for planning, development, and execution of test content in varied domains including system stress. Work in collaboration with design and architecture teams to root-cause failures using advanced debugging techniques. Develop high quality emulation test plans comprising of BareMetal content and OS based content for flushing even the most corner-case bugs. Create emulation models from RTL to run test content, using industry standard emulation platform technology. Review architecture and microarchitecture specs and influence design/microarchitecture decisions Partner with emulation vendor to debug and quickly resolve blocking issues in the emulation technology as required Verify performance and functionality of GPU/AI hardware , drivers, features ,application and tools. About you: M.Tech in Electronics Engineering or Computer Engineering with 3+ years of semiconductor experience or B.Tech in Electronics Engineering or Computer Engineering with 5+ years of semiconductor experience Knowledge about AI processor/GPU architecture , Linux systems development and memory consistency models in AArch64 and/or x86 and concurrency. Knowledge about GPU Stress and functional test development. Experience in GPU compute programming or parallel programming. Demonstrated ability to rapidly learn new technologies and apply them effectively. Experience developing bare-metal content using C/C++ and assembly language for verification. ARM assembly expertise preferred. Experience with Linux kernel development, device drivers and user space programming, FW development and debugging Experience in one of the protocols in preferred - Ethernet/USB/SATA/LPDDR/HBM. Experience debugging failures using innovative debug practices and familiarity with tools such as Verdi to debug RTL issues. Working experience with emulation technology of Zebu, Palladium or Mentor Veloce is strongly recommended. What we ll offer: At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, bonus (i.e., variable pay tied to internal company goals), long-term incentive, and comprehensive benefits. Benefits highlights include: Premium medical, dental, vision insurance, parental benefits including creche reimbursement, as well as a retirement plan, so that you can feel secure in your health, financial future and child care during work. Generous paid time off policy so that you can embrace a healthy work-life balance Fully catered lunch in our office along with a variety of healthy snacks, energizing coffee or tea, and refreshing drinks to keep you fueled and focused throughout the day. And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are passionate about inventing industry leading cloud-native designs that contribute to a more sustainable future. We are excited to share more about our career opportunities with you through the interview process.

System Programming with strong fundamentals in C Programming Experience in the area of Intel X86 processor-based system architectures, processor and chipsets, Memory management, Error management etc. Experience in EDKIi, Open-Source BIOS development and Initialization functionality for enterprise servers. In-depth understanding of Industry standards, such as, BMC, CPU (Intel X86), Intel PCH, MRC, PCle. HW debugging experience - ITP, Lauterbach or similar HW Debugging tools.

The ideal candidate should have a minimum of 4+ years of relevant experience in the following areas: - Proficiency in C and C++ programming languages. - Knowledge of 3GPP, LTE, and 5G NR Telecom standards. - Familiarity with RAN, BaseBand, and L1/L2/L3 protocol layers. - Experience working with Linux and Networking technologies. Required Skill Sets: - Strong programming skills in C, C++, C-Linux, and Bash. - Understanding of Telecom-IP Com and Telecommunication concepts. - Knowledge of 3GPP2, 3GPP, GSM, 2G, 3G, LTE, 5G, Networking, Wireless, and Baseband technologies. - Experience in DSP, RTOS, VxWorks, ARM, x86, ASIC, PHY, Embedded systems, Time series, and Digital signal processing. - Familiarity with CPRI, eCPRI, NETCONF, YANG, gNb, eNb, BTS, and RBS. The successful candidate should be able to demonstrate expertise in the mentioned areas and contribute effectively to the team's projects and goals.,

Meet the Team Internet became a reality because of Cisco and its intelligent innovations in WAN engineering over multiple decades. We are reinventing WAN now and disrupting the market. If you love the challenge of building a highly scalable intelligent distributed system, then please join the party. We are abstracting WAN infrastructure and programmatically building a highly flexible controller-based software defined solution to provide intent based networking. Our solutions provide secure connectivity to user & device from anywhere in the world to their favorite application running in cloud, on premise or as SaaS. We give the opportunity to learn and innovate in a vast technology space of Routing, Security, Analytics, Telemetry, Distributed System, Machine learning and endless other areas. We strive to create an open and transparent culture where we embrace new ideas with open arms. Hardware Routing Platform Software under Catalyst Engineering Routing team builds industry leading Headend SDWAN and Edge routing platforms (Catalyst 8500, Catalyst 8000 and ASR1000) is part of a bigger team that is currently working on building next generation routing and services in controller-based network deployment at scale, enabling the customers to avail secure, reliable, and fast connectivity in a highly distributed SDWAN fabric spanning across the globe connecting thousands of devices and millions of users. Join us and be part of the high energy team, help transform and build intelligent internet. Your Impact You will have the opportunity to work with leading-edge networking technologies in the areas of SDWAN and edge routing platforms and be part of the team responsible for defining, developing, and innovating new and evolving features and architectures in SDWAN and routing. You will work in collaboration with team who will define the next generation ASIC for routing products which would require new architecture for packet forwarding. You will participate in many creative projects, with the authority and scope to apply your expertise in a dynamic engineering environment. Our team values collaboration, learning, paramount focus on quality and customer impact. You will get a chance to work with various teams across varied technologies and will learn and be part of an ever growing, evolving technology. You will be responsible for crafting, coding and testing forwarding components with focus on end-to-end visibility and knowledge. You will have the opportunity to influence the network behavior by collaborating with other Engineers, Technical Leaders and Distinguished engineers across multiple cross-functional teams in Cisco. This role is for you if you believe you are passionate about problem solving, can articulate problems in a way that people start seeing solutions in it as well. You are someone who challenges the status quo and a driver of change. Minimum Qualifications and Requirement: * 10-14 years of Industry experience. Hands on experience on End-to-End Software development in a networking company in areas of Platforms, Hardware, bring up, system software, drivers (kernel and user space), bootloaders, BIOS and performance engineering/tuning * Strong C programming in Linux and device drivers with skills and familiarity with large software development projects in an UNIX or IOS environment including experience with source code control systems, i.e. ability to search, navigate and handle extremely large code base. * Experience with LAN/WAN communication interfaces, Ethernet layer 2, layer 3 technologies. * Experience with hardware and software debuggers, GDB, Arium, BDI. * Experience with scripting and automation and to be able to design, create and run scripts for longevity tests for platform, e.g Shell, Python, Perl, TCL, Expect. The successful candidate will participate on project teams defining and developing innovative new products based on Cisco technology. Key functions are following: * Develop, enhance, verify and sustain embedded system software for complex internetworking products as a key member of a cross-functional team. * Perform design trade-off analysis, write software specifications, code, integrate and test new software and hardware, complete product release, and provide field support. * Interface with Business Development, External Partners, Hardware Engineering, QA Test and Release Operations throughout the development cycle. *Act as Key Decision maker on Technical and Engineering Design issues. Desirable skills: * Knowledge or demonstrated experience with high-speed interfaces, PHY, MAC, MACSEC experience will be a plus. * Some of the key areas of expertise in addition to Networking domain is platform/System Areas such as kernel bring up, kernel driver development, platform bring up/ management software and Cloud Networking Technologies. * Experience in debugging platform issue with i2c, i2c trace analyzers, PCIe. * Knowledge of X86, ARM assembly code. * Motivated self-starter with good communication and organizational skills, with demonstrated ability to develop and deliver superior products in a cross-functional team environment under aggressive schedules. * Knowledge and experience of micro code and forwarding, datapath plus. * Knowledge and experience of DPDK is plus.

Experience: 3+years Requirements: Proficiency in C and C++ programming languages. Strong knowledge of hardware architecture such as ARM, MIPS, and x86 Familiarity with hardware protocols including USB, UART, I2C, SPI, Modbus, and CAN etc., Experience with OS platforms such as Linux, Unix, and RTOS. Excellent diagnostic skills. Strong analytical and problem-solving abilities. Knowledge of different IP protocols, interfaces and hardware subsystems Familiarity with software configuration management tools, defect tracking tools, and peer review Strong organizational and project management skills. Design, development, implementation, testing, and validation of embedded systems software. The ability to keep abreast with the latest advancements in technology and techniques. Strong problem-solving skills and attention to detail Excellent communication and collaboration skills

Position - C, Linux, Kernel Drivers and systems engineer with Networking | Platform Routing | 6+ years | Bangalore Your Impact You will have the opportunity to work with leading-edge networking technologies in the areas of SDWAN and edge routing platforms and be part of the team responsible for defining, developing, and innovating new and evolving features and architectures in SDWAN and routing. You will work in collaboration with team who will define the next generation ASIC for routing products which would require new architecture for packet forwarding. You will participate in many creative projects, with the authority and scope to apply your expertise in a dynamic engineering environment. Our team values collaboration, learning, paramount focus on quality and customer impact. You will get a chance to work with various teams across varied technologies and will learn and be part of an ever growing, evolving technology. You will be responsible for crafting, coding and testing forwarding components with focus on end-to-end visibility and knowledge. You will have the opportunity to influence the network behavior by collaborating with other Engineers, Technical Leaders and Distinguished engineers across multiple cross-functional teams in Cisco. This role is for you if you believe you are passionate about problem solving, can articulate problems in a way that people start seeing solutions in it as well. You are someone who challenges the status quo and a driver of change. Minimum Qualifications and Requirement: 5-8 years of Industry experience. Hands on experience on End-to-End Software development in a networking company in areas of Platforms, Hardware, bring up, system software, drivers (kernel and user space), bootloaders, BIOS and performance engineering/tuning Strong C programming in Linux and device drivers with skills and familiarity with large software development projects in an UNIX or IOS environment including experience with source code control systems, i.e. ability to search, navigate and handle extremely large code base. Experience with LAN/WAN communication interfaces, Ethernet layer 2, layer 3 technologies. Experience with hardware and software debuggers, GDB, Arium, BDI . Experience with scripting and automation and to be able to design, create and run scripts for longevity tests for platform, e.g Shell, Python, Perl, TCL , Expect. The successful candidate will participate on project teams defining and developing innovative new products based on Cisco technology. Key functions are following: Develop, enhance, verify and sustain embedded system software for complex internetworking products as a key member of a cross-functional team. Desirable skills: Knowledge or demonstrated experience with high-speed interfaces, PHY, MAC, MACSEC experience will be a plus. Some of the key areas of expertise in addition to Networking domain is platform/System Areas such as kernel bring up, kernel driver development, platform bring up/ management software and Cloud Networking Technologies. Experience in debugging platform issue with i2c, i2c trace analyzers, PCIe. Knowledge of X86, ARM assembly code. Motivated self-starter with good communication and organizational skills, with demonstrated ability to develop and deliver superior products in a cross-functional team environment under aggressive schedules. Knowledge and experience of micro code and forwarding, datapath plus. Knowledge and experience of DPDK is plus.

About Us . Role Summary Teams mandate is to find new and notable threats, assess their risk and produce protection where necessary. This include advanced targeted attacks, "attack tool" research, handling of vulnerability advisories and publishing blogs and whitepapers. The successful candidate will provide analysis of the evolving cyber threat landscape and contribute to create the next generation of SophosLabs research tools. The ideal candidate is passionate about computer security and has high aptitude for solving challenging puzzles with an attention to detail. What you will do Perform cyber threat analysis utilizing multiple information sources Engage research based on cyber threat intelligence Investigate APT campaigns and understand cyber threat actors, their motivations and technical capabilities Identify steps to be taken to respond and minimize the impact of emerging threats Reverse engineer files to discover their intended functionality and risks to customers Write threat descriptions for publication on the Sophos website and threat research whitepapers in a timely fashion Triage requests submitted by other departments, respond to tasks or escalate complex issues to senior team members Generating intelligence on new trends in the Threat Landscape and distributing between departments outside of the Lab Identify opportunities to write blogs for the Sophos website to raise customer awareness What you will bring 5+ yrs in Threat Researcher role Experience with x86 assembly Windows Internals Computer and Web Security experience Programming skills and experience (C/C++/Python/Perl) Reverse Engineering experience using IDA Pro, WinDbg, OllyDbg and Hex editors Good written and verbal communication skills Understanding of scripting basics (Perl/Python/Regexp) Experience with a wide array of Internet technologies and protocols (HTML, JavaScript, SMTP, DNS) Experience with a broad range of operating systems Bachelor s degree in computer software (or equivalent) #LI-Remote #B2 Ready to Join Us? At Sophos, we believe in the power of diverse perspectives to fuel innovation. Research shows that candidates sometimes hesitate to apply if they dont check every box in a job description. We challenge that notion. Your unique experiences and skills might be exactly what we need to enhance our team. Dont let a checklist hold you back we encourage you to apply. Whats Great About Sophos? Sophos operates a remote-first working model, making remote work the primary option for most employees. However, some roles may necessitate a hybrid approach. Please refer to the location details in our job postings for further information. Our people we innovate and create, all of which are accompanied by a great sense of fun and team spirit Employee-led diversity and inclusion networks that build community and provide education and advocacy Annual charity and fundraising initiatives and volunteer days for employees to support local communities Global employee sustainability initiatives to reduce our environmental footprint Global fitness and trivia competitions to keep our bodies and minds sharp Global wellbeing days for employees to relax and recharge Monthly wellbeing webinars and training to support employee health and wellbeing Our Commitment To You We re proud of the diverse and inclusive environment we have at Sophos, and we re committed to ensuring equality of opportunity. We believe that diversity, combined with excellence, builds a better Sophos, so we encourage applicants who can contribute to the diversity of our team. All applicants will be treated in a fair and equal manner and in accordance with the law regardless of gender, sex, gender reassignment, marital status, race, religion or belief, color, age, military veteran status, disability, pregnancy, maternity or sexual orientation. We want to give you every opportunity to show us your best self, so if there are any adjustments we could make to the recruitment and selection process to support you, please let us know. Data Protection If you choose to explore an opportunity, and subsequently share your CV or other personal details with Sophos, these details will be held by Sophos for 12 months in accordance with our Privacy Policy and used by our recruitment team to contact you regarding this or other relevant opportunities at Sophos. If you would like Sophos to delete or update your details at any time, please follow the steps set out in the Privacy Policy describing your individual rights. For more information on Sophos data protection practices, please consult our Privacy Policy Cybersecurity as a Service Delivered | Sophos

: Job Title Senior Engineer Home Loan Savings, VP LocationPune, India Role Description Our Home Loan Savings teams at Deutsche Bank - Private Bank (TDI) develop and maintain applications for home loan savings business of Private Customers (BHW). Changes are implemented on time to market challenges as well as on development of the application landscape by using Google Cloud technology. In addition to the SAP-based home loan savings and mortgage lending core systems the application portfolio also includes the business partner data systems, the connection to payment transactions, as well as the interface to the frontends and the data preparation and delivery for the banks dispositive systems. We are acting as a pilot for the migration to the Google Cloud with our applications and are preparing for the transition to an agile collaboration model. We are now building a team in India to work closely with the existing team in Germany, leveraging virtual collaboration techniques and the diversity of our team to achieve our goals of continuous delivery, process improvement, and internalization of technical expertise. As an engineer, you are responsible for the design and implementation of technical solutions within the BHW system landscape. You are an expert in COBOL on x86. You work closely with colleagues from the business analysis, IT architecture and IT operation departments in both agile and waterfall ways, contributing to the success of the growing domain Home Loan Savings. What well offer you 100% reimbursement under childcare assistance benefit (gender neutral) Sponsorship for Industry relevant certifications and education Accident and Term life Insurance Your key responsibilities Together with the solution architects you drive the architecture of our platform and the development process and are responsible for software design in your area. Your primary focus will be on software design, development and unit-testing activities including peer code reviews. You provide high-quality solutions that meet functional as well as non-functional requirements. You support the team of project managers, solution architects and business analysts at all stages of the software life cycle (feasibility studies, effort estimates, technical design, development, testing and documentation) You stay up to date (especially Google Cloud Technology), supported by internal and external training, continuously develop and proactively share your knowledge with your colleagues You support the operation of our existing IT landscape through 3rd Level Support Your skills and experience Expertise and minimum 12 years of experience in Cobol development, especially on an x86 platform with Micro-Focus in combination with Oracle, SQL, and PL/SQL Very good knowledge of architecture and integration patterns, code conventions and other best practices Experience working on UNIX Shell scripting. Basic development knowledge in Oracle including writing basic to complex queries. Very good knowledge of architecture and integration patterns, code conventions and other best practices Experience with Agile/SCRUM environment including agile tooling together with Experience and knowledge of investment business and its operations. Experience managing Agile Projects along with technical skills and should be willing to perform dual role. Pro-active team player with good communication and English language skills. How well support you

At F5, we strive to bring a better digital world to life. Our teams empower organizations across the globe to create, secure, and run applications that enhance how we experience our evolving digital world. We are passionate about cybersecurity, from protecting consumers from fraud to enabling companies to focus on innovation. Our Employees Are valued and empowered, collaborative and team oriented, innovative in their approach and passionate about their work. They are reliable, trustworthy and open with a high level of integrity. They value diversity, are inclusive and are committed to a global mindset. About the Product Using high-performance DNS services, Global Traffic Manager (GTM) scales and secures your DNS infrastructure during high query volumes and DDoS attacks. It delivers a complete, real-time DNSSEC solution that protects against hijacking attacks. GTM improves the performance and availability of your applications by intelligently directing users to the closest or best-performing physical, virtual, or cloud environment. In addition, enables mitigation of complex threats from malware and viruses by blocking access to malicious IP domains. Position Summary Our team is at the cutting-edge of DNS technology. We are focused on providing customers with solutions to improve access to applications by securing and accelerating Domain Name resolution. Collaborations with F5s Firewall and Hardware teams produce unique opportunities for cross-team development projects. This position is for a Software Engineer III with experience designing and developing application data management software. The engineer will collaborate with software architects and other technical leads to design software and interfaces for our next generation features. We are looking for talented software engineers with a track record of accomplishment in the design, implementation and maintenance of major software features. Appropriate candidates should also have a knack for delving into complex customer configurations and delivering rapid fixes for critical issues. Responsibilities Develop new feature and software solutions for the F5 DNS products in areas such as: DNSSEC and similar security-related functionality. Ultra High Performance DNS server and resolver technology. Next generation geolocation technology. Document software designs via functional specifications and other design documents. Diagnose and resolve customer-facing issues, ranging from point fixes to complete feature re-implementation Evaluate performance data, tune and re-evaluate designs and implementations of current source code. Research, investigate, and define new areas of technology to enhance existing F5 DNS products. Document bug fixes and known issues for customer access Work collaboratively with other development team within F5 to create solutions for complex issues Qualifications 3+ year of professional experience in multi-platform network software development, in a commercial production environment. Bachelor degree in computer/engineering related field or equivalent work experience Proven programming skills/abilities in both C and C++ Development experience in areas such as sockets, multithreading, and data structure optimization. Familiarity with TCP/IP networking a strong plus. Experienced with at least one scripting language such as Python, Perl, Understanding of regexes Background in Unix based operating systems specifically, x86/Linux Strong problem-solving and analytical skills Proven ability to deliver products with highest quality and on time Strong written and verbal communications skills Ability to collect and document user specifications Ability to interact and communicate effectively with users of our products Physical Demands and Work Environment Daily computer use in an office environment. Occasional need to install computer equipment in racks and replace existing equipment. Equipment includes servers, routers, power supplies, and network appliances. Benefits: We provide competitive salaries, a world class benefits package, including 100% of the premium for employee medical, dental and vision insurance, highly subsidized premiums for dependent coverage, 401K match, employees stock purchase plan, 18 days paid time off within the 1st year and 9 paid holidays, life insurance, short & long term disability insurance, tuition reimbursement, and much more. The is intended to be a general representation of the responsibilities and requirements of the job. However, the description may not be all-inclusive, and responsibilities and requirements are subject to change. Please note that F5 only contacts candidates through F5 email address (ending with @f5.com) or auto email notification from Workday (ending with f5.com or @myworkday.com ) . Equal Employment Opportunity It is the policy of F5 to provide equal employment opportunities to all employees and employment applicants without regard to unlawful considerations of race, religion, color, national origin, sex, sexual orientation, gender identity or expression, age, sensory, physical, or mental disability, marital status, veteran or military status, genetic information, or any other classification protected by applicable local, state, or federal laws. This policy applies to all aspects of employment, including, but not limited to, hiring, job assignment, compensation, promotion, benefits, training, discipline, and termination. F5 offers a variety of reasonable accommodations for candidates . Requesting an accommodation is completely voluntary. F5 will assess the need for accommodations in the application process separately from those that may be needed to perform the job. Request by contacting accommodations@f5.com.

Maintain Debian packages for IBM-Z (s390x) compilers and related toolchain components. Work with internal development to resolve bugs/issues relating to Debian packaging, dependency, and integration. Contribute to the Debian distribution community through package related bug triaging, package uploads and mailing list participation. Collaborate with upstream communities to track new releases, apply patches, and back-port fixes as needed. Ensure packages meet Debian policy, quality, and security standards. Maintain change-logs, documentation, and reproducible build practices. Required education Bachelor's Degree Required technical and professional expertise Required Qualifications 5+ years of working experience in maintaining Debian packages (ideally as a Debian Maintainer or a Debian Developer). Strong knowledge of Debian packaging tools (dpkg, debhelper, lintian, pbuilder, sbuild, etc.). Experience with compiler internals and build systems (e.g., Make, CMake etc.). Solid knowledge of Linux systems and shell scripting (bash, Python, etc.). Understanding of upstream/downstream coordination in open source projects. Soft Skills Excellent written and verbal communication skills. Ability to work independently and in a distributed, asynchronous team. Preferred technical and professional experience Preferred Qualifications Debian Maintainer (DM) or Debian Developer (DD) status. Experience with debugging packaging issues/bugs on IBM-Z architecture and also on multi-architectures (e.g., x86, arm64) using gdb or other debugging tools. Contributions to upstream compiler or toolchain projects (e.g. GCC, LLVM, etc.).

Lead the unit level pre-silicon functional & performance verification of the front end of the pipeline for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for Instruction fetch, Branch Prediction and Instruction Decode units of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 12 years or more experience in functional verification of processors, demonstrating a deep understanding of core units (eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying frontend pipeline units of any CPU architecture. Hands on experience of Branch Prediction techniques. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Nice to haves - Knowledge of instruction dispatch and Arithmetic unit. - Knowledge of test generation tools and working with ISA reference model. - Experience with translating ISA specifications to testplan. - Knowledge of verification principles and coverage. - Understanding of Agile development processes. - Experience with DevOps design methodologies and tools.

Lead the core level pre-silicon functional & performance verification for our next -generation IBM POWER processor core systems offering. Understand the IBM Power ISA and micro-architecture of the processor core, understand and enhance the existing unit and core level verification environment. Develop deep understanding of the processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units of the high performance processor CPU. Hands on debug for core level fails, propose and implement stimulus enhancements and drive improving the debug capabilities for core testbench environments. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 12 years or more experience in functional verification of processors, demonstrating a deep understanding of complete processor pipeline stages. Good understanding of computer architecture, including Processor core design specifications,processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units Experience with high frequency, instruction pipeline designs. At least 1 generation of Processor Core silicon bring up experience. In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Nice to haves - Knowledge of verification principles and coverage. - Knowledge of test generation tools and working with ISA reference model. - Experience with translating ISA specifications to testplan. - Understanding of Agile development processes. - Experience with DevOps design methodologies and tools.

Job Specs : - Expertise in the x86 BIOS / UEFI FSP / coreboot development - Expertise with x86 CPU/APU architectures and associated compilation tools - Expertise in C programming - Expertise with platform bring-up - Expertise with standard protocols like PCIe, SPI, eSPI, ACPI, SMM - Expertise with opensource coreboot project & mainboard related porting with GPIO, PCIe lanes, board fmd configs and board bring-up experience on customer platforms. - Expertise on working with Intel FSP package source code and understanding of coreboot & FSP boot flow - Expertise with different coreboot payloads like edk2, SeaBios, Tianocore etc - Ability to read platform Hardware and Processor specifications to understand the coreboot mainboard porting required - Good coreboot upstreaming exposure - Familiar with coreboot boot stages, upds, memory map, FSP, devicetree concept, payloads to OS bootloader handoff - Understanding of coreboot & FSP build tools and build processes - Good understanding of UEFI framework concepts to port UEFI code to FSP - Working knowledge of Git for code reviews, source code management, and BIOS releases to QA. - Ability to juggle tasks and respond to different teams for various requests for custom BIOS requirements. - Good understanding of x86-64 architecture from BIOS developer's perspective. - Good understanding of UEFI BIOS Boot flow. - Basic understanding of Linux Kernel like software development concepts (Kconfig).

SMTS SOC Architect PCIe/CXL/UAL/DMA THE ROLE: AMD-Xilinx is looking for a SMTS SoC Architect to join the team in defining the next generation of Adaptive and Embedded SoCs. You will drive novel SoC architecture solutions across a wide range of applications, including Embedded Computing, AI/ML, Data Center, Communications, Automotive, and Aerospace, in close collaboration with customers, partners, product planning, SoC and IP architects, and design & verification teams. THE PERSON: As a SMTS SoC Architect you will help drive new architecture initiatives that leverage the state-of-the-art PCIe, CXL, and Confidential Compute technologies and standards. You will exercise your deep technical expertise and excellent communication skills to collaborate with design and product planning with an eye towards delivering innovative and highly competitive adaptive accelerators and embedded computing solutions. KEY RESPONSIBILITIES: Responsible for driving the SoC architecture, with a particular focus on I/O subsystems connected over PCIe, UAL or CXL. Define I/O subsystem and PCIe DMA architectures, including their interactions with internal embedded processor-subsystems, Network on Chip, Memory controllers, and FPGA fabric. Create flexible and modular I/O subsystem architectures that can be deployed in either chiplet, monolithic or 3D form factors. Work with customers, and cross-functional teams to scope SoC requirements, analyze PPA tradeoffs, and then define architectural requirements that meet the PPA and schedule targets. Define I/O subsystem and DMA hardware, software, and firmware interactions with embedded processing subsystems and external CPUs. Author architecture specifications in clear and concise language. Guide and assist pre-silicon design/verification and post-silicon validation during the execution phase. PREFERRED EXPERIENCE: Strong technical background architecting SoC and I/O subsystems involving PCIe, PCIe-DMA engines, or CXL. Deep technical knowledge of the PCIe or CXL protocol specifications, and how mandatory and optional protocol features are leveraged in PCIe or CXL devices. Domain expertise in embedded computing, aerospace & defense, data-center, networking, or automotive industries. Knowledge of I/O Subsystem and DMA interactions with internal embedded processor-subsystems (x86, RISC-V or ARM) and external host CPUs. Knowledge of bridging and ordering rule enforcement between on-chip protocols such as AXI, and off-chip protocols such as PCIe desired. Knowledge of ARM Processors and AXI Interconnects desired. Knowledge of FPGA and AI/ML Accelerators desired. Knowledge of boot, security, debug, telemetry and RAS desired. ACADEMIC CREDENTIALS: BS/MS/PhD in electrical or computer engineering or related field. LOCATION: Hyderabad, India #LI-MK1

Overview: TekWissen is a global workforce management provider throughout India and many other countries in the world. Position: BIOS -UEFI -Coreboot Location: Bangalore Work Type: Onsite Job Type: Full time Job Description: 5-15 years of experience in the x86 coreboot/FSP/BIOS development Experience with x86 CPU/APU architectures and associated compilation tools Expert in C language Experience with platform bring-up Familiar with coreboot boot stages, UPDs, memory map, FSP, devicetree concept, payloads to OS bootloader handoff Working experience of industry standard protocols like PCIe, SPI, eSPI, ACPI, SMM Experience on working with opensource coreboot project & mainboard related porting with GPIO, PCIe lanes, board fmd configs and board bring-up experience on customer platforms. Experience on working with Intel FSP package source code and understanding of coreboot & FSP boot flow Understanding of coreboot & FSP build tools and build processes Experience of working with different coreboot payloads like edk2, SeaBios, Tianocore etc Ability to read platform Hardware and Processor specifications to understand the coreboot mainboard porting required Good understanding of UEFI framework concepts to port UEFI code to FSP Additional Skillset : Working knowledge of Git for code reviews, source code management, and BIOS releases to QA. Ability to juggle tasks and respond to different teams for various requests for custom BIOS requirements. Good understanding of x86-64 architecture from BIOS developers perspective. Good understanding of UEFI BIOS Boot flow. Basic understanding of Linux Kernel like software development concepts (Kconfig). Academic credentials: Bachelors degree in computer science engineering from reputed college Master’s degree from reputed university is a big plus TekWissen® Group is an equal opportunity employer supporting workforce diversity.

About the Team At Nutanix, you will have the opportunity to be part of the Hypervisor team, a dynamic group that is spread out geographically. Despite being in different locations, the team collaborates effectively and maintains a strong sense of camaraderie. Working with the Hypervisor team means being surrounded by some of the most talented engineers in the world of systems engineering. Culturally, Nutanix believes in creating an open and supportive environment where everyone can be their most authentic self at work. This setup also provides exciting exposure to diverse perspectives and opportunities for personal and professional growth. You will report to a manager who is committed to supporting your development and ensuring your success within the organisation. A day in the life of an AHV Hypervisor Engineer: We aim to work as closely with the open-source community as possible. Our engineers are highly encouraged to participate in open-source community development. Any work you do will be preserved as open-source and commit(s) to posterity. Problems youll solve: Weve always disrupted ourselves to provide the best in-class customer experience. A case in point: Nutanix is well known for providing a zero-touch upgrade experience for our customers. Within the hypervisor team, we are focussing on various ways to make this faster and more reliable -- by pushing the limits of VM live migrations towards speed and predictability, or rethinking why a hypervisor upgrade should need a reboot at all. Your Role Youll be working with a team of extremely talented engineers across a spectrum of geographies and experiences. The most successful candidate for this role will be someone who: Constantly look for ways to improve the product, learning from customer questions and not limited to existing technologies. Devise solutions and back them up with solid research and numbers to prove their efficacy. Have the ability to convey ideas to a geographically diverse audience using excellent communication and writing skills. Participate in design discussions, often outside ones known comfort zonelearning on the go. Proactively mentor junior members of the team, finding ways to fuel their curiosity and leverage their unique strengths. Not hesitate to help out with customer escalations: Nutanix believes in putting customers first. While we have a huge, dedicated team to assist customers with any issues, there might be situations where engineering help might be sought to bail out an unfortunate outage. Take pride in working with open-source communities to fold product improvements back into community projects. What You Will Bring The must-haves: Rock-solid OS/systems fundamentals drive design and implementation. Low-level coding, debugging experience with at least one hardware architecture, preferably x86. The ability to write and maintain enterprise-quality code. Deep reasoning and detailed skills, which provide top-down thinking to break down abstract concepts into actionable pieces. Proven feature delivery experience: should have 8+ years of hands-on experience of what it means to ship enterprise-quality code to customers. The good-to-haves: Knowledge of x86 virtualisation and the KVM stack. Code contributions to the Linux kernel and virtualisation stack are an added plus. Desired qualification & experience: Bachelor's/Masters degree in Computer Science or equivalent. 3+ years of experience building enterprise-grade software, preferably some with guide experience.

Job_Description":" Experience 0 - 3 yrs Skills Solid C++ programming capability. If only C, candidate should be strong with willingness to learn C++. Multi-threaded, Multi-process OS concepts understanding, design and development capability. Hungry to learn and contribute. Resourceful individual contributor. Area Control plane IP Stack (L2/L3) on Linux/QNX. SW Systems platform Card SW bring up on arm/x86/ppc architectures, Drivers, Kernel, HW component interaction and initialization, Systems housekeeping. Soft skills Understand the problem well, ask questions to your leads. Ensure fix is well thought out in Design and code, Test to cover use-cases optimally. Be crafty in code browsing and keep learning on the job.

Lead the architecture, design and development of a server class, high- performance Processor CPU for IBM Systems. - Architect and design Instruction caches, Branch Predictors, Issue queues, Register Renaming, Load Store Execution and other areas of the IBM processor CPU - Research novel instruction/data prefetching and branch prediction architectures. - Develop the features, present the proposed architecture in the High level design discussions - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature. - Develop micro-architecture, Design RTL, Collaborate with other Core units, Verification, DFT, Physical design, Timing, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in post silicon lab bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums. Required education Bachelor's Degree Preferred education Doctorate Degree Required technical and professional expertise Expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA - Experience with high frequency, instruction pipeline designs - In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) - Proficiency of RTL design with Verilog or VHDL - Nice to haves - Knowledge of verification principles and coverage - High-level knowledge of Linux operating system - Knowledge of object oriented languages and scripting languages - Understanding of Agile development processes - Experience with DevOps design methodologies and tools Preferred technical and professional experience Expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA - Experience with high frequency, instruction pipeline designs - In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) - Proficiency of RTL design with Verilog or VHDL - Nice to haves - Knowledge of verification principles and coverage - High-level knowledge of Linux operating system - Knowledge of object oriented languages and scripting languages - Understanding of Agile development processes - Experience with DevOps design methodologies and tools

- Lead the architecture, design and development of Instruction Sequencing Unit for high-performance Processor CPU of IBM Systems. - Architect and design Instruction Dispatch to Issue queues, Register Renaming for Out of Order Execution, Issue instructions to Execution Pipelines, Reordering Buffers for completion of a high performance processor CPU - Develop the features, present the proposed architecture in the High level design discussions - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature. - Develop micro-architecture, Design RTL, Collaborate with other Core units, Verification, DFT, Physical design, Timing, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in post silicon lab bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 8 or more years of demonstrated experience in architecting and designing Instruction Dispatch unit of CPU - Hands of experience of implementing Issue Queues, Register renaming and forwarding, Reordering Buffer and Pipeline flush/exception handling - Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA - Experience with high frequency, instruction pipeline designs - At least 1 generation of Processor Core silicon bring up experience - In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) - Proficiency of RTL design with Verilog or VHDL - Nice to haves - Knowledge of Instruction Decode and Execution units - Knowledge of verification principles and coverage - High-level knowledge of Linux operating system - Knowledge of one object oriented language and scripting language - Understanding of Agile development processes - Experience with DevOps design methodologies and tools

Lead the architecture, design and development of Processor Core Front end of pipeline units for high-performance IBM Systems. - Architect and design I-Cache, Instruction Fetch, Branch Prediction and Decode units of a high performance processor CPU - Develop the features, present the proposed architecture in the High level design discussions - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature. - Develop micro-architecture, Design RTL, Collaborate with other Core units, Verification, DFT, Physical design, Timing, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in post silicon lab bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums. Required education Bachelor's Degree Preferred education Doctorate Degree Required technical and professional expertise .12 or more years of demonstrated experience in architecting and designing specific CPU unit(eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) - Hands on experience of different Branch Prediction techniques - Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA - Experience with high frequency, instruction pipeline designs - At least 1 generation of Processor Core silicon bring up experience - In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) - Proficiency of RTL design with Verilog or VHDL - Knowledge of at least one object oriented or functional programming language and scripting language. - Nice to haves - Knowledge of instruction decode and handling pipeline hazards - Knowledge of verification principles and coverage - High-level knowledge of Linux operating system - Understanding of Agile development processes - Experience with DevOps design methodologies and tools Preferred technical and professional experience Hiring manager and Recruiter should collaborate to create the relevant verbiage.