95 X86 Jobs - Page 3

Experience band:- 5 to 8 years. PCIe Protocol Expertise. Gen-6 Experience with PCIe gen 5 or 6 hardware and/or device drivers for Linux Very Strong C/C++ development skills in Linux and embedded environments Linux Kernel Development: Proficiency in Linux kernel internals, including writing and debugging kernel modules and drivers, especially for PCIe devices. Knowledge of PCIe bus link aggregation Experience with ARM and x86 processors in embedded Linux system design and development, including firmware development for PCIe devices.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Experience : 5 - 8 Years of relevant experience with System level exposure on ARM SOC Mandatory Skills: Good understanding of processor architecture, Multicore/Multiprocessor with SMP/heterogenous cores. Good understanding on Cache hierarchy, coherency, and snoop concepts Good Understanding of CPU Dynamic Frequency and Voltage Switching, Low Power Modes C language expertise for low level programming, Assembly language for any processor. Exposure to CPU Architecture based on ARM or x86. Exposure to SoC architecture paradigms "“ interconnects, power management. Desired Skills Hands on experience On Linux operating system, Kernel debuggers, Kernel and Linux Device drivers Exposure to Memory architecture, through with Weakly ordered memory model and barriers concepts RISC-V architectural knowledge would be an added plus. Exposure to SoC architecture paradigms "“ interconnects, power management. Exposure to working on emulation/pre-si environment is added advantage. Hands on experience with JTAG based debuggers. Bring-up of hardware-software solution on emulation platforms and on fresh SOC designs. ASIC digital design fundamentals and methodology would be an added advantage. Knowledge of Linux kernel internals (process scheduler, memory management, concurrency / synchronization, memory allocation, file systems) and profiling Responsibilities Create the Complex Test content scenarios in the Baremetal/Linux OS world in the process scheduler, memory management, concurrency / synchronization, memory allocation, file systems Able to understand various hardware modules constituting CPU sub-system and its interfaces. Ability to work with hardware design team to develop low level drivers for early enablement. Chalk out hardware functional validation plan, develop test bench and execute during pre and post silicon SOC bring up phases to expose HW issues. Excellent communication skills and ability to work with diverse teams to drive HW debugs to conclusion. Use silicon debug hooks to measure power/performance/coverage and other KPI metrics

About The Role : Client PnP Solutions Architect will develop and enhance a robust PnP AI/ML framework deployed across Intel Client platforms to achieve or surpass platform quality and PnP targets. Insights gained from these deployments and analytics will feed back into future client products and beyond by ensuring continuous improvement. Client PnP Solutions Architect will work on PnP KPIs/KEIs projections on customer configurations by considering dynamic factors like OS upgrades, third-party OEM components, and drivers by deploying insights from PnP AI/ML framework. Qualifications Minimum Qualifications Bachelor degree with 12+ years or Master degree with 10+ years in any of the following field:Computer Science or Data Science and Engineering, Electronics or Electrical Engineering, Applied mathematics, or related technical disciplines. Skills: Strong programming skills in Python, with the capability to debug complex asynchronous systems. Hands-on experience in database design, deployment, and maintenance with programming using dot NET,.NET, LINQ, SQL Server, Web API 2.0, Net Core, JavaScript, C, C++, and Angular. Hand-on experience in creating, and deploying automation scripts using Python, C hash, and batch scripting to streamline workflows and enhance functionality. Experience in windows batch scripting, PowerShell scripting, Python and Windows automation. Working knowledge on development and maintenance of automation solutions for Adobe software, AI applications, 3D gaming platforms, browsers, and Microsoft Teams on Windows OS. Expertise in computer architecture and x86 architecture, working experience in platform, post-silicon and PnP validation. Sound knowledge and experience in various domains such as CPU, AI, Graphics, Gaming and Camera. Machine Learning Expertise: In-depth knowledge of machine learning techniques, including regression, classification, LDA, Naive Bayes, Logistic Regression, and SVM. Deep Learning and Generative AI : Solid understanding of ML/DL techniques, algorithms, and tools. Experience with CNN, RNN (LSTM), and Transformers (BERT, BART, GPT/T5, Megatron, LLMs). Knowledge of various prompt techniques, including zero-shot, few-shot,Experience with database and tools such as SQL, MongoDB, Graph DB, and Elastic Search in native AI applications. ML Ops: Proven experience in deploying and maintaining high-scale AI-based systems.Understanding of scalable deployment of multiple microservices involving LLM-driven RAG and Agent applications in a production environment.Familiarity with Docker, Helm, Kubernetes, etc.Experience with the end-to-end software lifecycle, release packaging, and CI/CD pipeline. Preferred Skills: Good understanding of Computer Architecture and x86 architecture. Experienced in Platform Software Development and Validation. Behavioral traits: Excellent written and oral communication skills.Be able to clearly communicate technical details and concept. Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.

SENIOR SOFTWARE SYSTEMS DESIGNER THE ROLE: We are looking for a dynamic, energetic Software Systems Design Engineer to join our growing team. As a key contributor to the success of AMD s products, you will be part of a leading team to drive and improve AMD s abilities to deliver the highest quality, industry-leading technologies to market. The Software Systems Design Engineering team fosters and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. PREFERRED EXPERIENCE: Expert in C/C++, Python scripting Good knowledge of Java Virtual Machines just-in-time (JIT) compiler Familiarity with compiler design principles and optimization techniques Knowldge in JVM optimizations and Java bytecode instructions Debug techniques and methodologies . Knowledge of system architecture, technical debug, and validation strategies . Strong understanding of data structures and algorithms Knowlege in assembly language relevant to the target platform for fine-tuning generated code. Prior experience with x86 code generation a plus. Handon experience in profiling and performance monitoring tools to analyze system bottlenecks is a plus Excellent Communication and Presentation skills . ACADEMIC CREDENTIALS: Bachelors or master s degree in Electronics/computer engineering/Electrical . Master s degree preferred. #LI-VV1 Benefits offered are described: AMD benefits at a glance .

Design, develop, and maintain x86 BIOS/UEFI firmware, ensuring robust and efficient solutions aligned with project specifications. Collaborate with hardware and software teams to support x86 CPU/APU architectures, optimizing performance through expert-level C programming. Work on UEFI bootloaders and applications, focusing on UEFI-based storage protocols such as AHCI, SATA, and NVMe. Perform platform hardware analysis and interpret processor specifications to support coreboot mainboard porting and integration. Integrate and customize BIOS code bases (AMI, Insyde, or Phoenix BIOS) to meet customer and platform requirements. Debug and resolve firmware-related issues, leveraging deep knowledge of UEFI framework concepts and storage protocols. Contribute to the development of Android UEFI-based bootloaders for x86 platforms, if applicable. Maintain code quality through rigorous testing, documentation, and adherence to best coding practices. Provide technical guidance and mentorship to junior developers, supporting knowledge sharing and team growth. Collaborate with cross-functional teams to ensure smooth firmware delivery, addressing technical challenges proactively. Skills Must have 5-15 years of experience in the x86 BIOS/UEFI development Experience with x86 CPU/APU architectures and associated compilation tools Expert in C language Familiar with at least one BIOS code base (AMI, Insyde, or Phoenix BIOS) Experience working on UEFI bootloader or UEFI applications mainly involved in UEFI-based storage protocols AHCI, SATA, and NVMe. Will be good if have any experience in Android UEFI-based Bootloader for x86. Ability to read platform Hardware and Processor specifications to understand the coreboot mainboard porting required. Good understanding of UEFI framework concepts and Storage protocols. Nice to have Working knowledge of Git for code reviews, source code management, and BIOS releases to QA. Ability to juggle tasks and respond to different teams for various requests for custom BIOS requirements. Good understanding of industry-standard protocols like SATA, NVMe, AHCI, PCIe, SPI, eSPI etc. Good understanding of specifications like ACPI, SMM. Good understanding of x86-64 architecture from BIOS developers perspective. Good understanding of UEFI BIOS Boot flow. Bachelors degree in computer science engineering from a reputed college Masters degree from a reputed university is a big plus

Manages customer success process for a defined territory Should retain customers and grow contracts by Upselling doing multi-year renewals (more than 1 year) Ensure timely support renewals for small to medium-sized customers in assigned territory Organize Customer Onboarding and Customer Success Programs Provides management with performance feedback First-line management contact for customer escalations Serves as a resource to other organizations for process and policy questions Troubleshoots problems and escalates as necessary Assists in key indicator reporting and trend analysis Educates customers on e-business practices and any associated contractual implications Ensures customer awareness and understanding of the applicable elements of the Support portfolio Responsible for meeting productivity requirements on outbound calls for renewals Manages exceptions for customers with issues that may delay or inhibit renewals Desired Profile: Excellent communication and negotiation skills with a right customer service attitude. Takes initiative; and uses all available resources Should be open for 24x7 environment Strong analytical skills and should have good knowledge of excel Excellent research and problem-solving skills with an analytical bent of mind Effectively manages time and priorities to meet service levels Self-motivated; focused and driven to achieve goals Exercises judgment, initiative and discretion when providing solutions to customers Able to apply knowledge and make decisions with minimal direction from management Projects a positive, professional image Demonstrated ability to meet deadlines Demonstrated ability to suggest and implement continual improvements Demonstrated ability to work in collaboration with others to achieve goals Career Level - IC2

Role & responsibilities Performs functional logic verification of a block, subsystem, and SoC related to DCAI flagship AI products to ensure design will meet specifications. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications. Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs. Replicates, root causes, and debugs issues in the pre-silicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates and communicates with SoC architects, micro architects, full chip architects, RTL developers, post silicon, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage. Maintains and improves existing functional verification infrastructure and methodology. Absorbs learning from post silicon on the quality of validation done during pre-silicon development, updates test plan for missing coverages, and proliferates to future products. Preferred candidate profile Candidate should have a BS, MS or PhD in Electrical or Computer Science Engineering or related field with 5+ years of technical experience. Related technical experience should be in/with: Silicon Design and/or Validation/Verification. Design/Verification with developing, maintaining, and executing complex IPs and/or SOCs. Design/Verification exposure for Ethernet or PCIe Subsystem involving full protocol stack - Transaction layer, Data Link Layer and PHY Layer Design/verification exposure for Industry standard BUS topologies such as AMBA AXI/AHB/APB , I2C, SPI, JTAG, CoreSight Debug and Trace OVM, UVM, System Verilog, constrained random verification methodologies. The complete verification life cycle (verification architecture, test plan, execution, debug, coverage closure). Developing validation test suites and driving continuous improvement into existing validation test suites and methodologies. Experience in Xeon CPU Pre-Silicon or Post Silicon Validation. Excited to shape the future with cutting-edge AI flagship products? Join our dynamic team! Please share your updated resume and take the next step in your career. Thanks & Regards

Person at this position owns architecture/ design of a specific technology area or a sub-system, formulates new solution and ideas and produces new or original work. Person demonstrates the ability to justify a stand or decision supported by sound technical knowledge base in a specific technology area or a sub-system. Person is able to the represent the organization externally in detailed technical discussion with the customer with a high level of authority on technical matters in a specific technology area or a sub-system. Person leads projects which are of significant organisational profile and makes trade-off decisions to deliver solutions that both meet customers technical requirements and timelines. Person demonstrates the ability to analyse and interpret complex problems and improve, change or adapt existing methods to solve the problem. Roles Responsibilities Responsible for ensuring that both functional and non-functional (e.g. performance, scalability, security) requirements will be met or exceeded Responsible for providing Architecture/ high level design/ test strategy for the existing projects and new proposals for a specific technology area or a sub-system. Responsible for identification and evaluation of various tools, test languages or test methodologies and choosing the best ones for a specific technology area or a sub-system. Responsible for participating in Customer interaction for major/critical change requests/new features, moderating the meetings and highlighting impact on schedule and effort. Responsible for reviewing Design Documents and code, Test coverage and its alignment with technical objectives. Responsible for leading the specification of complex customer requirements for a specific technology area or a sub-system. Responsible for leading/ participating in technical reviews to ensure quality parameters are being met. Responsible for contribution to RFP/Documentation/complete responsibility for proposal relating to growth in existing accounts/effort estimation for new proposals. Expected to contribute to technical capability development of organisation through subject matter expertise. Expected to keep self-updated on trends, new developments, tools etc. in ones own area of expertise and proactively share the knowledge. Education and Experience Required Engineering graduate, MCA, etc Experience ; > 8 years Competencies Description KERNEL AND DRIVERS - LINUX Engineer is one who has done one or more of the following on Embedded Linux: design, development/customization, bug fixing/sustenance who is familiar with one or more of the following Linux Kernel configuration;board bring up;device tree; porting/adapting device drivers; For Android specialization, following will be additional : Android patches/configuration; Android architecture Platforms- Mandatory to have worked on one or more of the following: Embedded Linux; ARMEmbedded Linux; x86/Intel Atom Technology Standard- NA Tools- Mandatory to have worked on one or more of the following Lauterbach; Build system-Makefile; Gerrit; Git Languages- Mandatory to have worked on one or more of the following C Specialization- POWER MANAGEMENT, PERIPHERALS, MEDIA , DISPLAY , CONNECTIVITY , DATA PROTOCOL, SECURITY, PERFORMANCE, ANDROID, CARRIER GRADE PLATFORM

about the role Working close to the Linux kernel and constructing the base layer (embedded Linux, drivers, BSP, bootloaders) of the hardware platforms (Home Gateways) Work on the latest technologies and standards, heavily interacting with different chip-vendors and hardware manufacturers to create the "connected home" of tomorrow Developing software components taking into account the specific architectures of the platform (hardware/software acceleration, offload...) Developing management software for multiple WAN technologies (xPON, xDSL, FTTH, ) Exploiting the chipset and board capabilities to offer the best performances and experiences. Developing software for securely loading and updating the gateways. Creative and able to think conceptually, Eager to learn and try new things Strong analytic and synthesis skills are required about you At least 3 years experience in Embedded Software development ( C language mandatory) Hands on experience with Linux software development and very good debugging skills (gdb, JTAG) Good knowledge of the Linux kernel/OS and device drivers (GPIO, flash storage, Ethernet ) Knowledge of Linux bootloaders for embedded systems (u-boot) Knowledge of networking stacks and related management protocols (TCP/IP L2/L3, xDSL, OMCI) Good to have: Experience with openWrt or prpl development is a plus Good to have: Experience with hardware-software integration of chipsets relevant in the router/gateway industry (ARM/MIPS/x86 SoC s from Broadcom, MxL, Qualcomm, Mediatek, ) is a plus department Hosted Staff- Innovation India Orange Business is a network and digital integrator that understands the entire value chain of the digital world, freeing our customers to focus on the strategic initiatives that shape their business. Every day, you will collaborate with a team dedicated to providing consistent, sustainable global solutions, no matter where our customers operate. With over 30,000 employees across Asia, the Americas, Africa, and Europe, we offer a dynamic environment to develop and perfect your skills in a field filled with exciting challenges and opportunities.

about the role Working close to the Linux kernel and constructing the base layer (embedded Linux, drivers, BSP, bootloaders) of the hardware platforms (Home Gateways) Work on the latest technologies and standards, heavily interacting with different chip-vendors and hardware manufacturers to create the "connected home" of tomorrow Developing software components taking into account the specific architectures of the platform (hardware/software acceleration, offload...) Developing management software for multiple WAN technologies (xPON, xDSL, FTTH, ) Exploiting the chipset and board capabilities to offer the best performances and experiences. Developing software for securely loading and updating the gateways. Creative and able to think conceptually, Eager to learn and try new things Strong analytic and synthesis skills are required about you At least 5 years experience in Embedded Software development ( C language mandatory) Hands on experience with Linux software development and very good debugging skills (gdb, JTAG) Good knowledge of the Linux kernel/OS and device drivers (GPIO, flash storage, Ethernet ) Knowledge of Linux bootloaders for embedded systems (u-boot) Knowledge of networking stacks and related management protocols (TCP/IP L2/L3, xDSL, OMCI) Good to have: Experience with openWrt or prpl development is a plus Good to have: Experience with hardware-software integration of chipsets relevant in the router/gateway industry (ARM/MIPS/x86 SoC s from Broadcom, MxL, Qualcomm, Mediatek, ) is a plus department Hosted Staff- Innovation India Orange Business is a network and digital integrator that understands the entire value chain of the digital world, freeing our customers to focus on the strategic initiatives that shape their business. Every day, you will collaborate with a team dedicated to providing consistent, sustainable global solutions, no matter where our customers operate. With over 30,000 employees across Asia, the Americas, Africa, and Europe, we offer a dynamic environment to develop and perfect your skills in a field filled with exciting challenges and opportunities.

The Opportunity Nutanix AHV builds on top of the open-source x86-KVM stack, with an emphasis on performance, scale, and reliability. The hyperconverged nature of our stack provides the phenomenal potential for optimisations, cutting across various parts of our stack right from the kernel and ranging up to, but not limited by, the management layer. An innovative hyperconverged stack needs out-of-the-box solutions. We are looking for original thinkers who wont hesitate to demanding conventional thought. About the Team At Nutanix, you will have the opportunity to be part of the Hypervisor team, a dynamic group that is spread out geographically. Despite being in different locations, the team collaborates effectively and maintains a strong sense of camaraderie. Working with the Hypervisor team means being surrounded by some of the most talented engineers in the world of systems engineering. Culturally, Nutanix believes in creating an open and supportive environment where everyone can be their most authentic self at work. This setup also provides exciting exposure to diverse perspectives and opportunities for personal and professional growth. You will report to a manager who is committed to supporting your development and ensuring your success within the organisation. A day in the life of an AHV Hypervisor Engineer: We aim to work as closely with the open-source community as possible. Our engineers are highly encouraged to participate in open-source community development. Any work you do will be preserved as open-source and commit(s) to posterity. Problems you ll solve: We ve always disrupted ourselves to provide the best in-class customer experience. A case in point: Nutanix is well known for providing a zero-touch upgrade experience for our customers. Within the hypervisor team, we are focussing on various ways to make this faster and more reliable -- by pushing the limits of VM live migrations towards speed and predictability, or rethinking why a hypervisor upgrade should need a reboot at all. Your Role You ll be working with a team of extremely talented engineers across a spectrum of geographies and experiences. The most successful candidate for this role will be someone who: Constantly look for ways to improve the product, learning from customer questions and not limited to existing technologies. Devise solutions and back them up with solid research and numbers to prove their efficacy. Have the ability to convey ideas to a geographically diverse audience using excellent communication and writing skills. Participate in design discussions, often outside one s known comfort zone learning on the go. Proactively mentor junior members of the team, finding ways to fuel their curiosity and leverage their unique strengths. Not hesitate to help out with customer escalations: Nutanix believes in putting customers first. While we have a huge, dedicated team to assist customers with any issues, there might be situations where engineering help might be sought to bail out an unfortunate outage. Take pride in working with open-source communities to fold product improvements back into community projects. What You Will Bring The must-haves: Rock-solid OS/systems fundamentals drive design and implementation. Low-level coding, debugging experience with at least one hardware architecture, preferably x86. The ability to write and maintain enterprise-quality code. Deep reasoning and detailed skills, which provide top-down thinking to break down abstract concepts into actionable pieces. Proven feature delivery experience: should have 8+ years of hands-on experience of what it means to ship enterprise-quality code to customers. The good-to-haves: Knowledge of x86 virtualisation and the KVM stack. Code contributions to the Linux kernel and virtualisation stack are an added plus. Desired qualification & experience: Bachelors/Master s degree in Computer Science or equivalent. 0-3 years of experience building enterprise-grade software, preferably some with guide experience. Work Arrangement Hybrid: This role operates in a hybrid capacity, blending the benefits of remote work with the advantages of in-person collaboration. For most roles, that will mean coming into an office a minimum of 2 - 3 days per week, however certain roles and/or teams may require more frequent in-office presence. Additional team-specific guidance and norms will be provided by your manager. -- Nutanix is an Equal Employment Opportunity and (in the U. S. ) an Affirmative Action employer. Qualified applicants are considered for employment opportunities without regard to race, color, religion, sex, sexual orientation, gender identity or expression, national origin, age, marital status, protected veteran status, disability status or any other category protected by applicable law. We hire and promote individuals solely on the basis of qualifications for the job to be filled. We strive to foster an inclusive working environment that enables all our Nutants to be themselves and to do great work in a safe and welcoming environment, free of unlawful discrimination, intimidation or harassment. As part of this commitment, we will ensure that persons with disabilities are provided reasonable accommodations. If you need a reasonable accommodation, please let us know by contacting [email protected] .

The Opportunity Nutanix AHV builds on top of the open-source x86-KVM stack, with an emphasis on performance, scale, and reliability. The hyperconverged nature of our stack provides the phenomenal potential for optimisations, cutting across various parts of our stack right from the kernel and ranging up to, but not limited by, the management layer. An innovative hyperconverged stack needs out-of-the-box solutions. We are looking for original thinkers who wont hesitate to demanding conventional thought. About the Team At Nutanix, you will have the opportunity to be part of the Hypervisor team, a dynamic group that is spread out geographically. Despite being in different locations, the team collaborates effectively and maintains a strong sense of camaraderie. Working with the Hypervisor team means being surrounded by some of the most talented engineers in the world of systems engineering. Culturally, Nutanix believes in creating an open and supportive environment where everyone can be their most authentic self at work. This setup also provides exciting exposure to diverse perspectives and opportunities for personal and professional growth. You will report to a manager who is committed to supporting your development and ensuring your success within the organisation. A day in the life of an AHV Hypervisor Engineer: We aim to work as closely with the open-source community as possible. Our engineers are highly encouraged to participate in open-source community development. Any work you do will be preserved as open-source and commit(s) to posterity. Problems you ll solve: We ve always disrupted ourselves to provide the best in-class customer experience. A case in point: Nutanix is well known for providing a zero-touch upgrade experience for our customers. Within the hypervisor team, we are focussing on various ways to make this faster and more reliable -- by pushing the limits of VM live migrations towards speed and predictability, or rethinking why a hypervisor upgrade should need a reboot at all. Your Role You ll be working with a team of extremely talented engineers across a spectrum of geographies and experiences. The most successful candidate for this role will be someone who: Constantly look for ways to improve the product, learning from customer questions and not limited to existing technologies. Devise solutions and back them up with solid research and numbers to prove their efficacy. Have the ability to convey ideas to a geographically diverse audience using excellent communication and writing skills. Participate in design discussions, often outside one s known comfort zone learning on the go. Proactively mentor junior members of the team, finding ways to fuel their curiosity and leverage their unique strengths. Not hesitate to help out with customer escalations: Nutanix believes in putting customers first. While we have a huge, dedicated team to assist customers with any issues, there might be situations where engineering help might be sought to bail out an unfortunate outage. Take pride in working with open-source communities to fold product improvements back into community projects. What You Will Bring The must-haves: Rock-solid OS/systems fundamentals drive design and implementation. Low-level coding, debugging experience with at least one hardware architecture, preferably x86. The ability to write and maintain enterprise-quality code. Deep reasoning and detailed skills, which provide top-down thinking to break down abstract concepts into actionable pieces. Proven feature delivery experience: should have 8+ years of hands-on experience of what it means to ship enterprise-quality code to customers. The good-to-haves: Knowledge of x86 virtualisation and the KVM stack. Code contributions to the Linux kernel and virtualisation stack are an added plus. Desired qualification & experience: Bachelors/Master s degree in Computer Science or equivalent. 6-12 years of experience building enterprise-grade software, preferably some with guide experience. Work Arrangement Hybrid: This role operates in a hybrid capacity, blending the benefits of remote work with the advantages of in-person collaboration. For most roles, that will mean coming into an office a minimum of 2 - 3 days per week, however certain roles and/or teams may require more frequent in-office presence. Additional team-specific guidance and norms will be provided by your manager. -- Nutanix is an Equal Employment Opportunity and (in the U. S. ) an Affirmative Action employer. Qualified applicants are considered for employment opportunities without regard to race, color, religion, sex, sexual orientation, gender identity or expression, national origin, age, marital status, protected veteran status, disability status or any other category protected by applicable law. We hire and promote individuals solely on the basis of qualifications for the job to be filled. We strive to foster an inclusive working environment that enables all our Nutants to be themselves and to do great work in a safe and welcoming environment, free of unlawful discrimination, intimidation or harassment. As part of this commitment, we will ensure that persons with disabilities are provided reasonable accommodations. If you need a reasonable accommodation, please let us know by contacting [email protected] .

Expertise in the x86 BIOS / UEFI FSP / coreboot development Expertise with x86 CPU/APU architectures and associated compilation tools Expertise in C programming Expertise with platform bring-up Expertise with standard protocols like PCIe, SPI, eSPI, ACPI, SMM Expertise with opensource coreboot project & mainboard related porting with GPIO, PCIe lanes, board fmd configs and board bring-up experience on customer platforms. Expertise on working with Intel FSP package source code and understanding of coreboot & FSP boot flow Expertise with different coreboot payloads like edk2, SeaBios, Tianocore etc Ability to read platform Hardware and Processor specifications to understand the coreboot mainboard porting required Good coreboot upstreaming exposure Familiar with coreboot boot stages, upds, memory map, FSP, devicetree concept, payloads to OS bootloader handoff Understanding of coreboot & FSP build tools and build processes Good understanding of UEFI framework concepts to port UEFI code to FSP Working knowledge of Git for code reviews, source code management, and BIOS releases to QA. Ability to juggle tasks and respond to different teams for various requests for custom BIOS requirements. Good understanding of x86-64 architecture from BIOS developers perspective. Good understanding of UEFI BIOS Boot flow. Basic understanding of Linux Kernel like software development concepts (Kconfig). Preferred resources with valid regional work permit.

Who We Are Arista Networks is developing cutting-edge network solutions to address the scalability, performance, and reliability requirements of large-scale high-performance computing and cloud data centers. Our team consists of experienced management and industry- leading engineering talent. Arista offers great benefits, work-life balance, and an environment that will challenge you to make a name for yourself in this industry. Look to join us as a premier company developing a new class of integrated network solutions for the next generation high-performance computing and web data centers. About the Role Our Hardware Design Engineering team is at the forefront of developing high-speed networking and Ethernet products used in Enterprise campuses, hyperscale datacenters and bleeding edge AI clusters. The team is responsible for the end-to-end design and development of advanced hardware solutions that meet the demands of modern networking environments. Job Responsibilities Candidates for this position would be responsible for the entire hardware design process: Authoring Functional Specifications for high density Ethernet switches Selecting and Qualifying Components Schematic Capture (both flat and hierarchical) Working closely with eCAD teams on PCB layout and component footprints Specifying PCB stackup and fabrication details with various PCB vendors Working closely with local and overseas Contract Manufacturers (CM), from proto through production Lab bring up and debug of prototypes Driving complex system debug between software, hardware, and test teams Training CM for high yield test and manufacturing Guiding groups of engineers and mentoring younger engineers BSEE or MSEE 5+ years of relevant experience in hardware engineering Embedded x86/ARM system design is highly desirable Experience working with multi-phase DC/DC s for high current, high transient loads Experie

Who We Are Arista Networks is developing cutting-edge network solutions to address the scalability, performance, and reliability requirements of large-scale high-performance computing and cloud data centers. Our team consists of experienced management and industry- leading engineering talent. Arista offers great benefits, work-life balance, and an environment that will challenge you to make a name for yourself in this industry. Look to join us as a premier company developing a new class of integrated network solutions for the next generation high-performance computing and web data centers. About the Role Our Hardware Design Engineering team is at the forefront of developing high-speed networking and Ethernet products used in Enterprise campuses, hyperscale datacenters and bleeding edge AI clusters. The team is responsible for the end-to-end design and development of advanced hardware solutions that meet the demands of modern networking environments. Job Responsibilities Candidates for this position would be responsible for the entire hardware design process: Authoring Functional Specifications for high density Ethernet switches Selecting and Qualifying Components Schematic Capture (both flat and hierarchical) Working closely with eCAD teams on PCB layout and component footprints Specifying PCB stackup and fabrication details with various PCB vendors Working closely with local and overseas Contract Manufacturers (CM), from proto through production Lab bring up and debug of prototypes Driving complex system debug between software, hardware, and test teams Training CM for high yield test and manufacturing Guiding groups of engineers and mentoring younger engineers BSEE or MSEE 5+ years of relevant experience in hardware engineering Embedded x86/ARM system design is highly desirable Experience working with multi-phase DC/DC s for high current, high transient loads Experie

Responsibilities Candidates primary responsibility is developing UEFI drivers and application for RAID/storage products. Candidate will also be developing UEFI HII for RAID/storage products. Sustain the design, development, integration, testing and deployment of UEFI RAID solution. Includes cross cultural communication with vendor and customer. Skills Must have Preferably relevant experience of 2-4 years. Advanced programming skills in C for systems development Solid understanding and experience with the UEFI architecture and libraries. Good working knowledge of UEFI drivers and UEFI applications. Good working knowledge of UEFI HII. Deep Knowledge of Computer Architecture. Good understanding of operating systems concepts, data structures, x86-64 architecture, and virtualization. Python, Shell Scripting, linux and windows system development an added advantage. Ability to work with minimal supervision on more than one task in parallel. Must be self-starter Good communication and time management skills Working with geographical teams an added advantage Nice to have Bachelors/masters in engineering. Other Languages English: B2 Upper Intermediate Seniority Regular Refer a Friend Positive work environments and stellar reputations attract and retain top talent. Find out why Luxoft stands apart from the rest. Recommend a friend Related jobs View all vacancies Software Developer C/C++ United States of America New York City DirectX12 Optimisation Expert C/C++ Serbia Remote Serbia DirectX12 Optimisation Expert C/C++ Romania Remote Romania Bengaluru, India Req. VR-112284 C/C++ Automotive Industry 03/03/2025 Req. VR-112284 Apply for Software Engineer - UEFI in Bengaluru *

Responsibilities Candidates primary responsibility is developing Windows Drivers for AMD x86 platform products. Candidate will have backup responsibilities of developing Linux Drivers, Application/tools development. Sustain the design, development, integration, testing and deployment of AMD windows solution. Includes cross cultural communication with vendor and customer. Skills Must have Preferably relevant experience of 4 8 years. Advanced programming skills in C/C++ for operating system kernel systems development Solid understanding and experience with the Windows Network or Storage Driver architecture, WDF WDM. Good understanding of PCIe, I2C , UFS, NVMe protocols. Good working knowledge of Storport and NDIS miniport driver. Deep Knowledge of Computer Architecture and Windows Kernel Internals. Good understanding of operating systems concepts, data structures, x86-64 architecture. Proficient use of git Python, Shell Scripting, BIOS knowledge an added advantage Ability to work with minimal supervision on more than one task in parallel. Ability to mentor technically and must be a self-starter. Good communication and time management skills Working with geographical teams an added advantage Nice to have Bachelors/masters in engineering. Other Languages English: B2 Upper Intermediate Seniority Regular Refer a Friend Positive work environments and stellar reputations attract and retain top talent. Find out why Luxoft stands apart from the rest. Recommend a friend Related jobs View all vacancies Software Developer C/C++ United States of America New York City DirectX12 Optimisation Expert C/C++ Serbia Remote Serbia DirectX12 Optimisation Expert C/C++ Romania Remote Romania Bengaluru, India Req. VR-112283 C/C++ Automotive Industry 03/03/2025 Req. VR-112283 Apply for Software Engineer - Platform Drivers Windows in Bengaluru *

Responsibilities Candidates primary responsibility is developing Windows Drivers for RAID products. Candidate will have backup responsibilities of developing Linux, UEFI, GUI Drivers for RAID products. Sustain the design, development, integration, testing and deployment of RAID solution. Includes cross cultural communication with vendor and customer. Skills Must have Preferably relevant experience of 4-8 years. Advanced programming skills in C/C++ for operating system kernel systems development Solid understanding and experience with the Windows Storage Driver architecture, WDF WDM. Good understanding of NVMe protocols. Good working knowledge of RAID Storport miniport driver. Deep Knowledge of Computer Architecture and Windows Kernel Internals. Good understanding of operating systems concepts, data structures, x86-64 architecture. Proficient use of git Python, Shell Scripting, BIOS knowledge an added advantage Ability to work with minimal supervision on more than one task in parallel Ability to mentor technically Must be self-starter Good communication and time management skills Working with geographical teams an added advantage Nice to have Bachelors/masters in engineering. Other Languages English: B2 Upper Intermediate Seniority Regular Refer a Friend Positive work environments and stellar reputations attract and retain top talent. Find out why Luxoft stands apart from the rest. Recommend a friend Related jobs View all vacancies Software Developer C/C++ United States of America New York City DirectX12 Optimisation Expert C/C++ Serbia Remote Serbia DirectX12 Optimisation Expert C/C++ Romania Remote Romania Bengaluru, India Req. VR-112286 C/C++ Automotive Industry 03/03/2025 Req. VR-112286 Apply for Software Engineer - Storage Windows in Bengaluru *

Who We Are Arista Networks is developing cutting-edge network solutions to address the scalability, performance, and reliability requirements of large-scale high-performance computing and cloud data centers. Our team consists of experienced management and industry- leading engineering talent. Arista offers great benefits, work-life balance, and an environment that will challenge you to make a name for yourself in this industry. Look to join us as a premier company developing a new class of integrated network solutions for the next generation high-performance computing and web data centers. About the Role Our Hardware Design Engineering team is at the forefront of developing high-speed networking and Ethernet products used in Enterprise campuses, hyperscale datacenters and bleeding edge AI clusters. The team is responsible for the end-to-end design and development of advanced hardware solutions that meet the demands of modern networking environments. Job Responsibilities Candidates for this position would be responsible for the entire hardware design process: Authoring Functional Specifications for high density Ethernet switches Selecting and Qualifying Components Schematic Capture (both flat and hierarchical) Working closely with eCAD teams on PCB layout and component footprints Specifying PCB stackup and fabrication details with various PCB vendors Working closely with local and overseas Contract Manufacturers (CM), from proto through production Lab bring up and debug of prototypes Driving complex system debug between software, hardware, and test teams Training CM for high yield test and manufacturing Guiding groups of engineers and mentoring younger engineers BSEE or MSEE 5+ years of relevant experience in hardware engineering Embedded x86/ARM system design is highly desirable Experience working with multi-phase DC/DC s for high current, high transient loads Experie

Who We Are Arista Networks is developing cutting-edge network solutions to address the scalability, performance, and reliability requirements of large-scale high-performance computing and cloud data centers. Our team consists of experienced management and industry- leading engineering talent. Arista offers great benefits, work-life balance, and an environment that will challenge you to make a name for yourself in this industry. Look to join us as a premier company developing a new class of integrated network solutions for the next generation high-performance computing and web data centers. About the Role Our Hardware Design Engineering team is at the forefront of developing high-speed networking and Ethernet products used in Enterprise campuses, hyperscale datacenters and bleeding edge AI clusters. The team is responsible for the end-to-end design and development of advanced hardware solutions that meet the demands of modern networking environments. Job Responsibilities Candidates for this position would be responsible for the entire hardware design process: Authoring Functional Specifications for high density Ethernet switches Selecting and Qualifying Components Schematic Capture (both flat and hierarchical) Working closely with eCAD teams on PCB layout and component footprints Specifying PCB stackup and fabrication details with various PCB vendors Working closely with local and overseas Contract Manufacturers (CM), from proto through production Lab bring up and debug of prototypes Driving complex system debug between software, hardware, and test teams Training CM for high yield test and manufacturing Guiding groups of engineers and mentoring younger engineers BSEE or MSEE 5+ years of relevant experience in hardware engineering Embedded x86/ARM system design is highly desirable Experience working with multi-phase DC/DC s for high current, high transient loads Experie

Contribute to the design and architecture of new or re-engineered enterprise software/Server environments. Prepare written software/storage specifications for sophisticated products from architectural diagrams and documents Build and review design, functional, technical and/or user documentation, as needed Independently implements reliable, scalable, and high-performance solutions. Essential Requirements: 8-12 years of software development experience using C, C++, C#, .Net Framework. Experience in InstallShield for server platforms. Experience in Windows Presentation Foundation (WPF) and Universal Windows Platform (UWP). Experience in ARM, X86, MIPS architecture. Experience in CI/CD and DevOps using PowerShell scripting. Desirable Requirements: Experience in Windows Device Driver will be an added advantage. Experience in Atlassian suite of tools (BitBucket, Jira and Confluence)

Contribute to the design and architecture of new or re-engineered enterprise software/Server environments. Prepare written software/storage specifications for sophisticated products from architectural diagrams and documents Build and review design, functional, technical and/or user documentation, as needed Independently implements reliable, scalable, and high-performance solutions. Essential Requirements: 5-8 years of software development experience using C, C++, C#, .Net Framework. Experience in Installshield for server platforms. Experience in Windows Presentation Foundation (WPF) and Universal Windows Platform (UWP). Experience in ARM, X86, MIPS architecture. Experience in CI/CD and DevOps using PowerShell scripting. Desirable Requirements: Experience in Windows Device Driver will be an added advantage. Experience in Atlassian suite of tools (BitBucket, Jira and Confluence)

What You ll Do The job involves working on Cisco UCS AI Server platform development activities. This team develops Software and Firmware for Cisco UCS platforms. This includes development of Server BMC (a.k.a Cisco Coordinated Management Controller) Firmware, Software, tools and utilities. In this role, you will have the opportunity to work and contribute in technical charter and provide technical development support for Baseboard Management Controller (BMC) activities. You will be part of the UCS AI Rack Server team, Bangalore, which is a key part of Ciscos Data Centre strategy. We are looking for hands-on Technical Engineers as applicants who strive in a fast paced start-up like environment. You will be part of a dedicated team and open communications, empowerment, innovation, collaboration and customer success are the foundations of the team. Responsibilities include: Software Engineer in the AI Server BMC team Demonstrate a high degree of originality and innovation in design/development activities. Be a hands-on Engineer working across different architectures and environments. Work closely with Hardware Team for reading and understanding schematic hardware bring up and debug activities. Work closely with group of other architects/collaborators to define the complete design. Help the Senior team members in the design of interfaces between products to ensure interoperability. Develop software in a real-time Linux (or similar) OS environment for Cisco UCS server platforms. Develop system software to meet the specification of platform requirements. Comprehend newer, complex datacentre customer requirements and translating to engineering features. Who You Are Required Experience and Skills: Excellent Data Centre/Cloud platform engineering Expertise Excellent hands-on experience in Firmware, Device Driver and Embedded/Real time systems development. Good knowledge of x86 and ARM architectures. Very Strong Expertise in C and other programming language(s) expertise is a plus. Very Strong proponent of Design understanding and abreast of new architecture/design/development methodologies Excellent verbal and written skills and professional presentation. Desired Experience and Skills Experience in Server/Storage chassis platform technologies A good experience and background in management controller firmware development (BMC) and IPMI/Redfish. Experience in HW tools like JTAG debuggers, I2C analyzers, Oscilloscopes and flash memory programmers. Experience in Industry standard protocols like PCIe, NVMe, CXL and other Interconnect/Server technologies would be plus. Experience with GIT/Bitbucket 4-8 Years of experience BE/BTech/ME/MTech in Electronics/Computer Science preferred.

Qube Research & Technologies (QRT) is a global quantitative and systematic investment manager, operating in all liquid asset classes across the world. We are a technology and data driven group implementing a scientific approach to investing. Combining data, research, technology and trading expertise has shaped QRT s collaborative mindset which enables us to solve the most complex challenges. QRT s culture of innovation continuously drives our ambition to deliver high quality returns for our investors. As a Senior C++ Low-Latency Developer, you ll design, develop, and optimize low-latency trading systems. The team builds trading infrastructure, execution gateways, and simulation environments that power QRT s global strategies. Your future role within QRT Design, develop, and optimize ultra-low-latency components for QRT s trading strategies. Build and enhance core trading systems, back testing engines, exchange simulators, and execution gateways. Optimize multithreaded and distributed systems for latency-sensitive applications. Work closely with researchers, traders, and operations teams to develop advanced trading solutions. Ensure top-tier performance, reliability, and scalability in a competitive trading environment. Your present skillset 7+ years of experience in low-latency development using C++, STL, and Boost on Linux. Proven experience in designing and implementing multithreaded and distributed systems for high-performance computing. Strong understanding of distributed network architecture and low-level optimization techniques on Linux x86/64 platforms. Familiarity building trading application is plus Experience working within a mature continuous development process in a fast-paced, mission-critical environment. Strong problem-solving skills, attention to detail, and the ability to work collaboratively in a high-performance global team

About The Role : Job Title: Senior Engineer Home Loan Savings, VP Location:Pune, India Role Description Our Home Loan Savings teams at Deutsche Bank - Private Bank (TDI) develop and maintain applications for home loan savings business of Private Customers (BHW). Changes are implemented on time to market challenges as well as on development of the application landscape by using Google Cloud technology. In addition to the SAP-based home loan savings and mortgage lending core systems the application portfolio also includes the business partner data systems, the connection to payment transactions, as well as the interface to the frontends and the data preparation and delivery for the banks dispositive systems. We are acting as a pilot for the migration to the Google Cloud with our applications and are preparing for the transition to an agile collaboration model. We are now building a team in India to work closely with the existing team in Germany, leveraging virtual collaboration techniques and the diversity of our team to achieve our goals of continuous delivery, process improvement, and internalization of technical expertise. As an engineer, you are responsible for the design and implementation of technical solutions within the BHW system landscape. You are an expert in COBOL on x86. You work closely with colleagues from the business analysis, IT architecture and IT operation departments in both agile and waterfall ways, contributing to the success of the growing domain Home Loan Savings. What we'll offer you As part of our flexible scheme, here are just some of the benefits that youll enjoy Best in class leave policy Gender neutral parental leaves 100% reimbursement under childcare assistance benefit (gender neutral) Sponsorship for Industry relevant certifications and education Employee Assistance Program for you and your family members Comprehensive Hospitalization Insurance for you and your dependents Accident and Term life Insurance Complementary Health screening for 35 yrs. and above Your key responsibilities Together with the solution architects you drive the architecture of our platform and the development process and are responsible for software design in your area. Your primary focus will be on software design, development and unit-testing activities including peer code reviews. You provide high-quality solutions that meet functional as well as non-functional requirements. You support the team of project managers, solution architects and business analysts at all stages of the software life cycle (feasibility studies, effort estimates, technical design, development, testing and documentation) You stay up to date (especially Google Cloud Technology), supported by internal and external training, continuously develop and proactively share your knowledge with your colleagues You support the operation of our existing IT landscape through 3rd Level Support Your skills and experience Expertise and minimum 12 years of experience in Cobol development, especially on an x86 platform with Micro-Focus in combination with Oracle, SQL, and PL/SQL Very good knowledge of architecture and integration patterns, code conventions and other best practices Experience working on UNIX Shell scripting. Basic development knowledge in Oracle including writing basic to complex queries. Very good knowledge of architecture and integration patterns, code conventions and other best practices Experience with Agile/SCRUM environment including agile tooling together with Experience and knowledge of investment business and its operations. Experience managing Agile Projects along with technical skills and should be willing to perform dual role. Pro-active team player with good communication and English language skills. How we'll support you Training and development to help you excel in your career Coaching and support from experts in your team A culture of continuous learning to aid progression A range of flexible benefits that you can tailor to suit your needs