95 X86 Jobs - Page 2

What You ll Do The job involves working on Cisco UCS AI Server platform development activities. This team develops Software and Firmware for Cisco UCS platforms. This includes development of Server BMC (a.k.a Cisco Coordinated Management Controller) Firmware, Software, tools and utilities. In this role, you will have the opportunity to lead the technical charter and provide technical vision for Baseboard Management Controller (BMC) activities. You will be part of the UCS AI Rack Server team, Bangalore, which is a key part of Ciscos Data Centre strategy. We are looking for hands-on Technical architects as applicants who strive in a fast paced start-up like environment. You will be part of a dedicated team and open communications, empowerment, innovation, collaboration and customer success are the foundations of the team. For further product info, please look at this link Responsibilities include: Senior Engineer in the AI Server BMC team Demonstrate a high degree of originality and innovation in design/development activities. Be a hands-on Engineer working across different architectures and environments. Work closely with Hardware Team for design, schematic review, hardware bring up and debug activities. Work closely with group of other architects/collaborators to define the complete design. Influence the design of interfaces between products to ensure interoperability. Design and develop software in a real-time Linux (or similar) OS environment for Cisco UCS server platforms. Design and develop system software to meet the specification of platform requirements. Comprehend newer, complex datacentre customer requirements and translating to engineering features. Who You Are Required Experience and Skills: Excellent Data Centre/Cloud platform engineering Expertise Excellent hands-on experience in Firmware, Device Driver and Embedded/Real time systems development. Good knowledge of x86 and ARM architectures. Very Strong Expertise in C and other programming language(s) expertise is a plus. Very Strong proponent of Design thinking and abreast of new architecture/design/development methodologies Excellent verbal and written skills and professional presentation. Desired Experience and Skills Experience in Server/Storage chassis platform technologies Hands on experience in management controller firmware development (BMC) and IPMI/Redfish. Experience in HW tools like JTAG debuggers, I2C analyzers, Oscilloscopes and flash memory programmers. Experience in Industry standard protocols like PCIe, NVMe, CXL and other Interconnect/Server technologies Experience with GIT/Bitbucket 8-12 Years of experience BE/BTech/ME/MTech in Electronics/Computer Science preferred.

Job Description: The UNIX Services Organization is searching for a candidate who is proficient with standard general purpose compute hardware in a Linux (RHEL and SLES) environment. The ideal candidate will have 10+ years of experience within system administration, with knowledge of physical infrastructure and hardware such as HPE ProLiant and Synergy series (x86 and Linux), GPU, VMware and Google Cloud is a plus. We are looking for a good communicator and a problem solver individual. Job Requirements 6+ years of experience with Linux (SLES or RHEL). 6+ years of UNIX Engineering/Administration: scripting, upgrades and configuration Management, performance management, troubleshooting and analysis. Experience of Server hardware, CPU technology, Memory, IO subsystem, Fabric Switches, various Ethernet hardware/NICs, bonding, etc. Good skills in TCP/IP Networking, network tuning. Experience installing layered products in a timely fashion, analyzing & troubleshooting complex systems and familiarity with writing test documentation/results. Experience in developing automation to reduce toil (Ansible preferred but not essential) Good understanding of system monitoring, such as CPU, Memory, Network IO, Disk IO. Good communication with internal and external stakeholders Key Responsibilities: Unix administrators and engineers need to be able to troubleshoot and resolve issues with the operating system, servers, hardware, applications, and software. Unix engineers work with cross-functional teams to ensure the Unix environment is optimized for performance, reliability, and security. Unix administrators install, configure, and maintain operating systems, servers, and networks. Unix system administrators set up user accounts. Unix system administrators install software packages. Unix system administrators update patches. Recruitment fraud is a scheme in which fictitious job opportunities are offered to job seekers typically through online services, such as false websites, or through unsolicited emails claiming to be from the company. These emails may request recipients to provide personal information or to make payments as part of their illegitimate recruiting process. DXC does not make offers of employment via social media networks and DXC never asks for any money or payments from applicants at any point in the recruitment process, nor ask a job seeker to purchase IT or other equipment on our behalf. More information on employment scams is available here .

We are looking to hire a Senior Systems Software Engineer. Do you love to provide innovative solutions and enjoy working on complex problems? NVIDIA is looking for phenomenal system software engineers like you to join us in our journey of building state of the art GPUs. To work within the Graphics Processing Unit (GPU) Software team to tackle complex System Software problems across NVIDIA GeForce/NVIDIA RTX (professional graphics) products on Linux platform. Work involves developing and maintaining software for the GPU Resource Manager Kernel driver. This kernel driver plays a key role in providing outstanding visual computing experience to millions of Workstations (Designers/Architects/Visual Effects), PCs and Notebooks (Gamers). What you ll be doing: Improving existing software by debugging, analyzing and providing solution to complex issues within areas like Display technologies, Power management etc. Work on designing, developing, unit testing, documenting and maintaining features for the kernel mode drivers. You will get an opportunity to work side by side to collaborate with forward-thinking and motivated engineers around the world, as an equal member of a multi-site project team. Tackle variety of problems that directly impact NVIDIA s End Users and partner OEMs. What we need to see: Your strong software engineering skills combined with a dedication to tackle hard problems are a requirement. 5+ years of hands-on experience in writing and debugging kernel mode drivers on X86/AMD64 platforms. Excellent programming skills, Proficiency in C / C++ language, libraries and toolchains. Detailed knowledge of Linux kernel internals and low-level system programming. Good written and verbal communication, along-with strong collaborative and networking skills. Experience in working on unreleased hardware platforms. Bachelors or Masters degree (or equivalent experience) in Computer Engineering, Computer Science or related field. Ways to stand out from the crowd: Experience with device driver development for ARM SOC platforms. Background with embedded system SW concepts, e. g: RTOS, overlay programming models. Contributions to upstream Passionate about what you do. NVIDIA is widely considered to be one of world s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If youre creative and passionate about new technology then we would like to hear from you.

about the role CONTEXT OF THE SERVICE / PROJECT: Within OBS, CSD Skill center organization defind the technical roadmap and strtegy for the OCB followed by need of Marketing, Pre-sales, platforms and Engineering team Level 3 support incident management support problem management support Change Management support Product industrialization technology watch (study, documentation) technical roadmap of Backup product release management (validation documentation) training of Engineering products to other teams such as implementation, operations, Pre-Sales, and Solution Marketing Design/ build detailed LLD (LLD1) technical support to architects/ offer experts technical handover of LLD1 to offer experts, operation implementation team Presales support technical support on customized solution quotation and workload estimation of integrating new component Techno watch study of new products/version proof of concept regular information on supplier roadmap and competitor vendor technical relations Knowledge management and Patch management Project design, build integration support (TTM or customer project) Customer design, build and support MAIN MISSION: Technical Roadmap Mgmt. Defining the Technology Roadmap for OCB Defining the Priority and Timelines of Roadmap deliverables Communicate the Roadmap within OCB (ENG, OPS, IMP, Marketing, Architects etc.) Release Management Governance Expert management for the Release Management Follow up meetings with experts on RM activities Release management dashboard Status update to the mgmt. Identification of Lab needs with associated budget External resources budget follow-up with management Vendor Technical Relationship Managing technical relationship between the vendors experts Anticipation Techno Watch and training delivery Managing Product Life Cycle Vulnerability Patch Management Ensuring the configuration of vigilance VMT are up to date Assigning the Vulnerabilities to the Experts and ensuring the progress Manage the validation and communication of vulnerabilities and patch mgmt.. Product Catalog and Communication Ensuring the Product Catalog should be upto date for marketing and pre-sales Ensuring the Technical Updates, News, Roadmap, Release Management, What s New information should be communicate regulary on time Quality Management of RM Ensuring the Quality of the Release Management Deliverables Ensuring the Quality of the Technical Handovers between CSE and Operations teams (Build Run) Technology Governance Process Take into account the need for New Technology or New Product Assess the relevance of introducing new techno or product in OCB portfolio Integrate the need in the RM process SkC Community Animation Managing meetings, exchanges on technical subject with technical experts, Architects Managing Plazza community communication with all stakeholders (ENG, OPS, IMP, Marketing, Architects, and Project Managers etc.) PreSales Support: Qualification of new demands or customer specific solutions. Providing technical support on customized solution, planning, schedule, cost and risk assumptions Think Design: Design and industrialization of solutions and components, design validation and technical support to architects/ offer experts of customer platforms Project Management : Project Kick-off Meeting with the VMware delivery team and the Customer project sponsors and stakeholders to set expectations about the purpose of the engagement, the delivery approach and timelines. Deliver solutions and customer projects on shared cloud platforms offerings Delete Description Type About you Description ID About you Visibility Internal and External Transversal Skills: Strong communication skills (English -> Read + Write + Speak) Good interpersonal skills Should be a team player Technical Skills: Overall knowledges on the following technologies NetBackup NetWorker NetApp Storage commvault backup ITIL / PMP about you Transversal Skills: Strong communication skills (English -> Read + Write + Speak) Good interpersonal skills Should be a team player Technical Skills: Overall knowledges on the following technologies VMWare classical suite (vSphere, vCenter) VMWare SDDC portfolio Hypersclaer cloud technologies (AWS, Azure, GCP) x86 Hardware (Dell, Cisco UCS) ITIL / PMP department Global Delivery Operations .

Linux Device Driver Location: Bangalore, Hyderabad, Chennai, Pune Skills/Experience: Exposure to some CPU arch like ARM or x86 or powerpc etc NPU Architecture: Broadcom preferable Qumran/Jericho family 5+ years of active hands-on work with C/C++ with proficient skills Exposure to linux device driver programming/ Kernel development /kernel programming is required. Good hands-on experience with SW programming language like C and scripting languages like Python, TCL/TL. Network Device driver experience Familiarity with Device Driver Development, integration and testing Knowledge of OS e.g Linux kernel, drivers and its file system etc. Good knowledge with SQA process Excellent problem-solving and interpersonal skills. Good communication skills, verbal and written Experience (years) : 5-10 years Education Qualification: BTECH/MTECH in Electrical/Electronics/Computer Science Engineering or Equivalent Location - Bengaluru,Hyderabad,Chennai,Pune

5+ years of professional experience Very good Linux knowledge with explicit experience in the low-level area (kernel, drivers and system-related libraries as well as POSIX functions and syscalls) Very good knowledge of processor architectures (ARM, x86), cross-development and cross-debugging, package management, network technology and protocols Explicit knowledge and experience with Yocto-based embedded Linux systems Explicit experience in the use of GNU (cross-) tool chain, Make, Git, etc. as well as knowledge of open source licenses Explicit experience in the areas of security (secure boot), boot time optimization, real-time extensions and Linux container concepts (LXC) Ideally experience with embedded hypervisors e.g. Jailhouse, ACRN, EB Tresos, ... Ideally experience with other embedded Linux distributions such as Buildroot, PTXdist or ELinOS Ideally experience with Zephyr or SELinux Ideally experience with other real-time operating systems such as VxWorks, QNX Ideally experience with RUST Skills and experience Degree in (technical) computer science, electrical engineering or communications engineering (Mainline) kernel and driver development for various processors and boards Performance analysis and optimization to increase the performance of the embedded system Analysis and implementation of Linux security features Integration of third party layers (components) Integration of real-time requirement.

class="job_description"> What You ll Do We are seeking a Solutions Engineer to join our dynamic sales team. As an SE, you will drive the adoption of our AI solutions across various industries. You will identify potential clients, understand their specific needs, and provide tailored AI solutions that enhance their business operations. This role requires a deep understanding of Data Center Compute & Networking. As a Cloud and AI Infrastructure Solutions Engineer, you will play a pivotal role in facilitating the success of the Cisco Field Sales teams in selling the full suite of Cloud and AI infrastructure solutions. You will help them position data center virtualization and systems architecture solutions effectively against competing offerings. You will be passionate about presales engineering activities, demonstrating solutions and architectures in Cloud and AI infrastructure. Who You ll Work With The Cloud + AI Infrastructure team delivers one scalable strategy with local execution for data center customer transformation and growth. We are the worldwide go-to-market compute and data center networking engine gathering market transitions and allowing sellers to expand growth for customers and Cisco. Alongside our colleagues, Cloud & AI Infrastructure builds the sales strategy, activates sellers and technical communities, and accelerates selling. Who You Are You will build awareness, fostering education and driving energy for AI with both internal and external team members, partners, etc. You will also act as a link between technical teams, account teams, executives, partners/customers. In addition, you will show case AI solutions/products, its potential and promote its tactical and technical responsibilities. You will play an important role in the design, development and promotion of AI Solutions and address challenges. You will need to travel as needed to meet with clients and attend industry events. Minimum Qualifications 5+ years knowledge of any combination of Datacenter, Storage, Compute, Apps, Big Data, Converged Infrastructure, AI infrastructure or Data Center Networking experience preferred. Seeking significant experience with end-to-end architecture/design work across multiple technology areas for DC and hybrid cloud solutions. Public, hybrid and private cloud computing and architecture experience along with Virtualization or X86 Architectures or Operating Systems Experienced in the design and/or deployment of Data Center solutions including traditional DC standalone design, VXLAN fabric-based architectures. Experience providing consumable documentation of standard methodologies for deployment around application acceleration, automation/management efficiencies, enterprise edge, and/or AI/ML solutions. Preferred Qualifications Bachelors Degree in Computer Science, Computer Engineering, Electrical Engineering, or related field. Advanced degree is a plus. Knowledge and understanding of networking protocols and technologies. Excellent presentation skills - ability to deliver engaging workshops to both technical and non-technical audiences on AI topics AI experience with Nvidia, IBM, Microsoft, Dell, NetApp, HPE, and/or other AI vendors In-depth understanding of language models, including but not limited to GPT-3, BERT, or similar architectures. Expertise in training and fine-tuning LLMs using popular frameworks such as TensorFlow, PyTorch, or Hugging Face Transformers. Experience in deploying LLM models in cloud environments (e.g., AWS, Azure, GCP) and on-premises infrastructure. Familiarity with containerization technologies (e.g., Docker or equivalent experience) and orchestration tools (e.g., Kubernetes) for scalable and efficient model deployment. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform crucial job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation. Why Cisco #WeAreCisco. We are all unique, but collectively we bring our talents to work as a team, to develop innovative technology and power a more inclusive, digital future for everyone. How do we do itWell, for starters - with people like you! Nearly every internet connection around the world touches Cisco. We re the Internet s optimists. Our technology makes sure the data traveling at light speed across connections does so securely, yet it s not what we make but what we make happen which marks us out. We re helping those who work in the health service to connect with patients and each other; schools, colleges, and universities to teach in even the most challenging of times. We re helping businesses of all shapes and sizes to connect with their employees and customers in new ways, providing people with access to the digital skills they need and connecting the most remote parts of the world - whether through 5G, or otherwise. We tackle whatever challenges come our way. We have each other s backs, we recognize our accomplishments, and we grow together. We celebrate and support one another - from big and small things in life to big career moments. And giving back is in our DNA (we get 10 days off each year to do just that). We know that powering an inclusive future starts with us. Because without diversity and a dedication to equality, there is no moving forward. Our 30 Inclusive Communities, that bring people together around commonalities or passions, are leading the way. Together we re committed to learning, listening, caring for our communities, whilst supporting the most vulnerable with a collective effort to make this world a better place either with technology, or through our actions. So, you have colorful hairDon t care. TattoosShow off your ink. Like polka dotsThat s cool. Pop culture geekMany of us are. Passion for technology and world changingBe you, with us! #WeAreCisco Message to applicants applying to work in the U.S. and/or Canada: When available, the salary range posted for this position reflects the projected hiring range for new hire, full-time salaries in U.S. and/or Canada locations, not including equity or benefits. For non-sales roles the hiring ranges reflect base salary only; employees are also eligible to receive annual bonuses. Hiring ranges for sales positions include base and incentive compensation target. Individual pay is determined by the candidates hiring location and additional factors, including but not limited to skillset, experience, and relevant education, certifications, or training. Applicants may not be eligible for the full salary range based on their U.S. or Canada hiring location. The recruiter can share more details about compensation for the role in your location during the hiring process. U.S. employees have access to quality medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, short and long-term disability coverage, basic life insurance and numerous wellbeing offerings. Employees receive up to twelve paid holidays per calendar year, which includes one floating holiday (for non-exempt employees), plus a day off for their birthday. Non-Exempt new hires accrue up to 16 days of vacation time off each year, at a rate of 4.92 hours per pay period. Exempt new hires participate in Cisco s flexible Vacation Time Off policy, which does not place a defined limit on how much vacation time eligible employees may use, but is subject to availability and some business limitations. All new hires are eligible for Sick Time Off subject to Cisco s Sick Time Off Policy and will have eighty (80) hours of sick time off provided on their hire date and on January 1st of each year thereafter. Up to 80 hours of unused sick time will be carried forward from one calendar year to the next such that the maximum number of sick time hours an employee may have available is 160 hours. Employees in Illinois have a unique time off program designed specifically with local requirements in mind. All employees also have access to paid time away to deal with critical or emergency issues. We offer additional paid time to volunteer and give back to the community. Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components. For quota-based incentive pay, Cisco typically pays as follows: .75% of incentive target for each 1% of revenue attainment up to 50% of quota; 1.5% of incentive target for each 1% of attainment between 50% and 75%; 1% of incentive target for each 1% of attainment between 75% and 100%; and once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation. For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.

Who You ll Work With Our Hardware Design Engineering team is at the forefront of developing high-speed networking and Ethernet products used in Enterprise campuses, hyperscale datacenters and bleeding edge AI clusters. The team is responsible for the end-to-end design and development of advanced hardware solutions that meet the demands of modern networking environments. What You ll Do: As a Hardware Board Design Engineer at Arista, you ll be responsible for the complete hardware design process, including authoring functional specifications, schematic capture, and collaborating with eCAD teams on PCB layout. You ll select and qualify components, specify PCB stackup and fabrication details, and work closely with contract manufacturers through the prototype and production phases. Additionally, you will lead lab bring-up, debug complex systems, and work cross-functionally with software and test teams. Mentoring junior engineers and ensuring high yield in manufacturing will also be key aspects of your role. Job Responsibilities Candidates for this position would be responsible for the entire hardware design process: Authoring Functional Specifications for high density Ethernet switches Selecting and Qualifying Components Schematic Capture (both flat and hierarchical) Working closely with eCAD teams on PCB layout and component footprints Specifying PCB stackup and fabrication details with various PCB vendors Working closely with local and overseas Contract Manufacturers (CM), from proto through production Lab bring up and debug of prototypes Driving complex system debug between software, hardware, and test teams Training CM for high yield test and manufacturing Guiding groups of engineers and mentoring younger engineers BSEE or MSEE 5+ years of relevant experience in hardware engineering Embedded x86/ARM system design is highly desirable Experience working with multi-phase DC/DC s for high current, high transient loads Experie

Who You ll Work With Our Hardware Design Engineering team is at the forefront of developing high-speed networking and Ethernet products used in Enterprise campuses, hyperscale datacenters and bleeding edge AI clusters. The team is responsible for the end-to-end design and development of advanced hardware solutions that meet the demands of modern networking environments. What You ll Do: You ll lead the hardware design process for high-performance networking products, from creating functional specifications and schematic design to collaborating with eCAD teams on PCB layout. You ll work with PCB vendors, oversee prototypes through to production, and ensure high yield in manufacturing. Additionally, you ll troubleshoot system issues with software and test teams, while mentoring junior engineers to drive innovation in high-speed networking solutions. Job Responsibilities Candidates for this position would be responsible for the entire hardware design process: Authoring Functional Specifications for high density Ethernet switches Selecting and Qualifying Components Schematic Capture (both flat and hierarchical) Working closely with eCAD teams on PCB layout and component footprints Specifying PCB stackup and fabrication details with various PCB vendors Working closely with local and overseas Contract Manufacturers (CM), from proto through production Lab bring up and debug of prototypes Driving complex system debug between software, hardware, and test teams Training CM for high yield test and manufacturing Guiding groups of engineers and mentoring younger engineers BSEE or MSEE 5+ years of relevant experience in hardware engineering Embedded x86/ARM system design is highly desirable Experience working with multi-phase DC/DC s for high current, high transient loads Experie

Lead the unit level pre-silicon functional & performance verification of the front end of the pipeline for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for Instruction fetch, Branch Prediction and Instruction Decode units of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of core units (eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying frontend pipeline units of any CPU architecture. Hands on experience of Branch Prediction techniques. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic unit. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Lead the unit level pre-silicon functional & performance verification the Load Store Unit for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for LSU, including the Load and Store pipelines, D-Cache, Address translation, out of order execution of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of load store unit verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing D-Cache, Address Translation, Memory Consistency handling, Store ordering etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic units. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Lead the unit level pre-silicon functional & performance verification the Instruction Sequencing Unit for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for ISU which covers the Issue queues, Register Renaming for Out of Order Execution, Issue instructions to Execution Pipelines, Reordering Buffers for completion of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of Instruction Dispatch verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing Issue Queues, Register renaming and forwarding, Reordering Buffer and Pipeline flush/exception handling etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic units. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage.

Who You ll Work With Our Hardware Design Engineering team is at the forefront of developing high-speed networking and Ethernet products used in Enterprise campuses, hyperscale datacenters and bleeding edge AI clusters. The team is responsible for the end-to-end design and development of advanced hardware solutions that meet the demands of modern networking environments. What You ll Do: You ll lead the hardware design process for high-performance networking products, from creating functional specifications and schematic design to collaborating with eCAD teams on PCB layout. You ll work with PCB vendors, oversee prototypes through to production, and ensure high yield in manufacturing. Additionally, you ll troubleshoot system issues with software and test teams, while mentoring junior engineers to drive innovation in high-speed networking solutions. Job Responsibilities Candidates for this position would be responsible for the entire hardware design process: Authoring Functional Specifications for high density Ethernet switches Selecting and Qualifying Components Schematic Capture (both flat and hierarchical) Working closely with eCAD teams on PCB layout and component footprints Specifying PCB stackup and fabrication details with various PCB vendors Working closely with local and overseas Contract Manufacturers (CM), from proto through production Lab bring up and debug of prototypes Driving complex system debug between software, hardware, and test teams Training CM for high yield test and manufacturing Guiding groups of engineers and mentoring younger engineers BSEE or MSEE 5+ years of relevant experience in hardware engineering Embedded x86/ARM system design is highly desirable Experience working with multi-phase DC/DC s for high current, high transient loads Experience working with high speed interfaces, such as DDR, PCIe Writing specifications and drawing schematics for high complexity boards Working closely with CAD designers on complicated layout and routing Working closely with Software and test engineers to bring-up and debug systems Experience with mass production Design for Manufacturability (DFM) Working with Contract Manufacturers Successfully taking products from concept to production

Who You ll Work With Our Hardware Design Engineering team is at the forefront of developing high-speed networking and Ethernet products used in Enterprise campuses, hyperscale datacenters and bleeding edge AI clusters. The team is responsible for the end-to-end design and development of advanced hardware solutions that meet the demands of modern networking environments. What You ll Do: As a Hardware Board Design Engineer at Arista, you ll be responsible for the complete hardware design process, including authoring functional specifications, schematic capture, and collaborating with eCAD teams on PCB layout. You ll select and qualify components, specify PCB stackup and fabrication details, and work closely with contract manufacturers through the prototype and production phases. Additionally, you will lead lab bring-up, debug complex systems, and work cross-functionally with software and test teams. Mentoring junior engineers and ensuring high yield in manufacturing will also be key aspects of your role. Job Responsibilities Candidates for this position would be responsible for the entire hardware design process: Authoring Functional Specifications for high density Ethernet switches Selecting and Qualifying Components Schematic Capture (both flat and hierarchical) Working closely with eCAD teams on PCB layout and component footprints Specifying PCB stackup and fabrication details with various PCB vendors Working closely with local and overseas Contract Manufacturers (CM), from proto through production Lab bring up and debug of prototypes Driving complex system debug between software, hardware, and test teams Training CM for high yield test and manufacturing Guiding groups of engineers and mentoring younger engineers BSEE or MSEE 5+ years of relevant experience in hardware engineering Embedded x86/ARM system design is highly desirable Experience working with multi-phase DC/DC s for high current, high transient loads Experience working with high speed interfaces, such as DDR, PCIe Writing specifications and drawing schematics for high complexity boards Working closely with CAD designers on complicated layout and routing Working closely with Software and test engineers to bring-up and debug systems Experience with mass production Design for Manufacturability (DFM) Working with Contract Manufacturers Successfully taking products from concept to production

Some careers shine brighter than others. If you re looking for a career that will help you stand out, join HSBC, and fulfil your potential. Whether you want a career that could take you to the top, or simply take you in an exciting new direction, HSBC offers opportunities, support and rewards that will take you further. HSBC is one of the largest banking and financial services organizations in the world, with operations in 64 countries and territories. We aim to be where the growth is, enabling businesses to thrive and economies to prosper, and, ultimately, helping people to fulfil their hopes and realize their ambitions. We are currently seeking an experienced professional to join our team in the role of Senior Lead Consultant Specialist Key Responsibilities: Lead team of 8 to 10 DevOps Engineers and guide them on automation engineering deliverables Design, develop and maintain the APIs (Application Programming Interface) of Distributed Compute products/services used by different business units Focus on automating all aspects of the Distributed Compute product services i,e Windows, Linux, x86 and Virtualisation, providing services via APIs, increase speed of provision, availability, and performance. Work with our Agile Teams, Architects, and Customer Success Managers to identify and implement the most optimal solution for the platform and our customers. Promote innovation and adoption of cutting-edge specialist technologies and practices within the domain Promote Engineering led mindset through coaching, and mentoring. Consult as required in other areas to assist and provide a different perspective to programmers or projects that require it. Keep up to date and have expertise on latest DevOps tools, technologies and areas like cyber security and regulations pertaining to aspects like data privacy, consent, data residency etc. that are applicable. Requirements Qualifications External To be successful in this role you should meet the following requirements: Bachelor s degree in engineering, Information Technology, or a related field (or equivalent experience) 15+ years experience in IT API Development Exp and Building new Engineering Solutions. 5 to 8 years of hands-on development experience working on APIs with strong/expert skills on Python, Ansible, Jenkins, Python FastAPI framework and Bash or JavaScript (JS) Proficient in RedHat Linux and Windows Operating System with working experience of large, complex estates Hands-on experience in Continuous Integration and Continuous Delivery (CI/CD) pipelines, code testing and code management in a large organization using GIT Knowledge of AI/ML will be advantage Understanding of Code Development frameworks and Test Case Writing for Ansible Leadership skills in managing engineers, development and performance reviews Experience of working with agile practices and toolsets including JIRA and Confluence Excellent written and verbal communication skills, with the ability to influence stakeholders at all levels. You ll achieve more when you join HSBC. HSBC is committed to building a culture where all employees are valued, respected and opinions count. We take pride in providing a workplace that fosters continuous professional development, flexible working, and opportunities to grow within an inclusive and diverse environment. Personal data held by the Bank relating to employment applications will be used in accordance with our Privacy Statement, which is available on our website.

About The Role Defines, develops, and executes platformbased validation environments, test suites, and plans and drives characterization and yield enhancements to ensure testability, manufacturability, and production of integrated circuits. Develops debug test methodologies, complex software programs for new device features, and design validation vectors. Evaluates components to ensure performance meets specifications and delivers optimal match of component requirements with production equipment capability. Applies knowledge of platform level tools and techniques to conduct root cause analysis, failure analysis, troubleshoot, and debug crossdiscipline and complex integration issues of the platform. Documents test results, analyzes test data, communicates results while continually improving test methods. Conducts integrated platform level validation, verifies that the product meets quality and/or reliability attributes and complies with applicable specifications. Drives product requirements as needed by customers to ensure necessary capabilities for platform validation activities. Collaborates with multiple teams across board design, power, platform design, development, and debug to ensure all features are validated and optimized timely. Works with product development engineers and end customers as first points of contact to support debug, root cause analysis, and customer platform issues. Qualifications The scope of the deliverable will vary based on the target platform and specific features of platform and SoC alike. Hence the candidate must have a solid big picture across the System.Minimum Requirements:Candidate must possess a Master's or Bachelor's degree in Electronics Engineering, Computer Engineering or a related discipline10+ years of Post-silicon or Pre-Silicon validation experience.Server or Client Computing Architecture knowledge (x86, ARM)Strong knowledge in any of domains like High-Speed Serial IO interfaces like PCIe, CXL (preferred), RAS, Manageability, Memory technologies, Reset flow.Experience with any of the debug tools like Lecroy/Keysight Protocol Analyzers, Logic Analyzers, JTAG, Kernel debuggersExperience in OS debug, kernel, or driver knowledge with Windows and/or Linux. Inside this Business Group The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intels transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies"”spanning software, processors, storage, I/O, and networking solutions"”that fuel cloud, communications, enterprise, and government data centers around the world. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intels offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at https://jobs.intel.com/ and not fall prey to unscrupulous elements. Working Model This role will require an on-site presence. *

Some careers shine brighter than others. If you re looking for a career that will help you stand out, join HSBC, and fulfil your potential. Whether you want a career that could take you to the top, or simply take you in an exciting new direction, HSBC offers opportunities, support and rewards that will take you further. HSBC is one of the largest banking and financial services organizations in the world, with operations in 64 countries and territories. We aim to be where the growth is, enabling businesses to thrive and economies to prosper, and, ultimately, helping people to fulfil their hopes and realize their ambitions. We are currently seeking an experienced professional to join our team in the role of Delivery Head Key Responsibilities: Manage customer engagement and senior stakeholders Shape Product roadmaps Define domain strategy Scope new feature requests Develop detailed designs for new products, solutions, automation and APIs Represent our domain in major projects Proactively identify and reduce technical debt and improve domain efficiency Act as a full stack engineer to support the wider domain. Requirements Qualifications External To be successful in this role you should meet the following requirements: Bachelor s degree in engineering, Information Technology, or a related field (or equivalent experience). 20+ years experience in IT. Full Stack Engineer Develop detailed designs for new products, solutions, automation and APIs High proficiency in technical consultancy and solution design Experience of DevOps tools such as Jenkins and GITHub Experience of agile and JIRA Be proficient in automation and API design Have suitable architect level knowledge in a range of enterprise technology, such as but not limited to virtualization, MS Windows, RedHat Linux, x86 hardware, Ansible An understanding of data analytics/data science.

The QNX Systems Software team is looking for Principal Senior Software Systems Developers for our Product Services Engineering teams. You will advise on architecture, design, and implementation of multi-core and multi-threaded systems, partly considering safety conditions (ie ISO26262) on the newest ARM and nx86-SoC from various silicon vendors. You must be someone with ideas and real passion for software delivered to maximize reuse, efficiency, and simplicity. Our customers count on us to convert awesome ideas into great products and services. In return for your skills, expertise and passion, we will provide you with an attractive compensation comprehensive benefits package. We have some of the brightest minds working on ground-breaking platforms at QNX. Join us and you'll become part of a team that is already leading the way and has even bigger plans for the future. Come join us! You will: Be in close contact with our customer, providing help and guidance on solutions Consult and give advice on architecture, design, and implementation of multi-core and multi-threaded systems, partly considering safety conditions (ISO26262) on the newest ARM and nx86-SoC from various silicon vendors Provide a mix of service and development activities, eg, where driver implementations or porting is required. Apply various concepts of debugging, (by instrumentation, trace logging, core-analysis, by applying various tools to extract information, code-reviews, JTAG, etc). Quickly familiarise yourself with foreign code, reading grasping architecture and implementation concepts, and of course finding gaps, risks, issues, etc Improve start-up and runtime performance, ie, to speed-up boot process or data throughput You will have the following technical skills: Bachelor s degree in computer science, computer engineering or equivalent experience Extensive knowledge hands on experience of C programming Experience writing software for major processor architectures (ARM, x86) Prior experience in driver development is needed Experience with real time OS, multi-threaded programming a plus Willing to learn state-of-the-art OS technology and its application in various industries Ability to work and participate in a global team setting with an open, collaborative communication style both internally and with our customer Excellent communication, presentation, and organizational skills Enthusiasm, a passion for quality and a desire to learn about new technologies For the Principal level, you will also have: Architectural design experience on QNX OS or its components OR experience with Linux or other POSIX based OS (Kernel Development)

The primary responsibility is the validation of BootROM, which includes the following tasks: Develop and execute test cases to validate all boot peripherals from where the FSBL (First Stage Boot Loader) is copied. Example: xSPI, SD, eMMC, UFS, USB Create and execute test cases to validate all proprietary boot sequences. Develop and execute test cases to validate all internal boot modes. Write and run test cases to validate all supported authentication algorithms. Develop and execute test cases to validate all supported encryption/decryption algorithms. Automate tests using Python. Perform testing on prototyping/emulation platforms, including X86 emulation. Identify, document, and track issues using JIRA. Report coverage metrics using tools such as Verdi and add tests to ensure maximum source line coverage. Review requirements and create associated test cases to ensure traceability. Collaborate with different teams to resolve any blockers. Engage in constructive discussions with the design team to improve the quality of the BootROM. Conduct security threat analysis using internal tools. Adhere to safety processes while performing the above tasks.

We are looking for a highly talented and passionate Software Development Manager to lead a team of Smart engineers developing SW drivers and solutions for next generation AMD platforms. He shall have strong motivation and interest to learn new technology, process and be versatile to expand to various domains. Strong x86 architecture background and/or Platform architecture background is a plus. Should have BE/MTECH/MS degree in Electronics, Computer Science, or related engineering field from reputed university. Should have 15+ yrs. of SW development experience with 10+ years in technical leadership and 5+ years in building and managing high performing software engineering team. Should have strong technical knowledge of semiconductor industry, lead teams as a technical influencer and deliver exceptional results. Key responsibilities As the Manager of the India team, the individual will be responsible for leading a high-caliber team of experienced SW engineers who are responsible for development and delivery of platform SW solutions for AMD s Next Gen products. Define and manage team deliverables. Project and plan for resources based on future needs Coordinate dependencies with other stakeholders (Design architects, Validation and Customer engineer teams) Collaborate with multi-functional teams contributing to program execution. Coach and mentor career growth for each individual team members so that they can bring out the best potential. Required Skills Experience in System level and/or large-scale software development Knowledge of variety of programming languages, codes, and processes. Expert in troubleshooting and ability to assess quickly complex system software solutions Understanding of CPU and / or system architecture with awareness of platform SW stack components (System BIOS, Device drivers, I/O, tools, etc.) Excellent interpersonal, written, and verbal communication skills. Manage project resource, cost, and timelines. Raise team productivity and effectiveness by defining and driving metric-driven software engineering best practices. Knowledge of Pre-silicon and Post-silicon product life cycle will be added advantage. Understanding and hands-on experience with Linux kernel driver development. Knowledge of Linux kernel upstream process is an added advantage. Preferred leadership experience: Should have managed a team of at least 10 engineers with complex projects. Demonstrated experience in team building, organization, budget planning, project management, and dependency tracking. Should have passion for code quality, operational excellence, and people development. Excellent communication skills, proactiveness and ability to work with minimal input and directions. Build an effective development organization by driving hiring of senior level engineers, developing, and managing the group and conducting performance reviews of team members. Academic Credentials: Bachelors/Master s in Engineering. Experience: 12 15 years.

Your curiosity will drive your learning and innovation to improve how we as a group, and an organization, can get better every day. Your peers will provide you a results-oriented and encouraging environment for your career growth, fueling your opportunity to be a part of Delighting Our Customers. KEY RESPONSIBILITIES: Problem solving across multiple software layers, (user space, kernel, applications, libraries) and hardware. Optimization/development of the CPU performance stack (applications, libraries) for AMD server processors. Analyze and solve performance, scalability bottlenecks when code is running on multi-core, multi-node deployments. Innovate and publish papers, patents and participate in technical conferences to advance AMD technologies. Continuously learn and grow along with evolving X86 server CPU architecture and application landscape. Lead collaborative approaches with multiple teams. Mentor others to achieve integrated projects Must be a self-starter, and able to independently drive tasks to completion PREFERRED EXPERIENCE: Very strong data structure and algorithmic skills. Experience in identifying performance bottlenecks, and designing/implementing optimizations to relieve analyzed bottlenecks. Experience in software development using C/C++ and debugging skills on multicore systems. Experience in performance analysis for data center, HPC (High Performance Computing), MPI (Message passing Interface) applications. Experience in x86 (or other architecture based) optimizations. Understanding of Cache sub-system, Instruction Set Architecture, pipeline (for any CPU). Bonus skills: Experience on Intel MKL libraries, Linear Algebra, FFT, x86 assembly programming. Knowledge of one or more CPU Profiling tools ACADEMIC CREDENTIALS: Bachelor s or Masters degree in Computer or Electrical Engineering or equivalent

Expertise in the x86 BIOS / UEFI FSP / coreboot development Expertise with x86 CPU/APU architectures and associated compilation tools Expertise in C programming Expertise with platform bring-up Expertise with standard protocols like PCIe, SPI, eSPI, ACPI, SMM Expertise with opensource coreboot project & mainboard related porting with GPIO, PCIe lanes, board fmd configs and board bring-up experience on customer platforms. Expertise on working with Intel FSP package source code and understanding of coreboot & FSP boot flow Expertise with different coreboot payloads like edk2, SeaBios, Tianocore etc Ability to read platform Hardware and Processor specifications to understand the coreboot mainboard porting required Good coreboot upstreaming exposure Familiar with coreboot boot stages, upds, memory map, FSP, devicetree concept, payloads to OS bootloader handoff Understanding of coreboot & FSP build tools and build processes Good understanding of UEFI framework concepts to port UEFI code to FSP\ Working knowledge of Git for code reviews, source code management, and BIOS releases to QA. Ability to juggle tasks and respond to different teams for various requests for custom BIOS requirements. Good understanding of x86-64 architecture from BIOS developer s perspective. Good understanding of UEFI BIOS Boot flow. Basic understanding of Linux Kernel like software development concepts (Kconfig). Preferred resources with valid regional work permit

Job Role: Senior Embedded Application Engineer Job Locations: Bengaluru Required Experience: 9 - 15 Years Skills: C / C++,Embedded Linux Critical Skills to Possess: Having experience in Embedded Linux on x86/ARM Proficient in C / C++ and experience of assembler Understand fundamentals of digital design and communication protocols such as asynchronous synchronous, serial, RS-232, RS-422, RS-485, Ethernet, SPI, I2C Experience using embedded tools; compilers, debuggers, JTAG, protocol analyzers, RTOS or OSes Having work experience in OPENwrt Linux Highly extensible GNU/ Linux distribution for embedded devices (typically wireless routers) Minimum 10 years of embedded software development experience in a constrained environment.

About The Role Defines, develops, and performs functional validation for integrated SoCs, focusing on validation of IP integration, interaction between IPs, and systemlevel features. Applies various hardware and software level tools and techniques to ensure validation coverage and that performance, power, and area goals are met. Reviews proposed design changes to assess impact on validation plans, tasks, and timelines. Develops SoC validation methodologies, validation test plans, executes validation plans, and collaborates with other engineers for design optimization, troubleshooting, and failure analysis. Performs silicon debug to identify root causes and resolves all functional and triage failures for SoC issues. Tests interactions between various SoC features using validation infrastructure. Develops postsilicon validation infrastructure (e.g., performance monitors, behavioral checkers, state space coverage) and test environment used in validation testing. Publishes SoC validation reports summarizing all validation activities performed, reviews results, and communicates to relevant teams. Works with architecture, design, verification, board, platform, and manufacturing teams to maintain and improve debug, validation test strategy, methodologies, and processes for SoC interfaces and to meet desired product specifications. Develops content to create or increase specific IP interactions using a variety of tools and techniques (including patching techniques using microcode, firmware, or custom OS builds). Engages in all phases of the product life cycle and develops and validates content, infrastructure, and bug hunts in multiple environments (e.g., simulation, emulation, FPGAs) to ensure silicon readiness. Qualifications Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: M.tech/ME with 5+ years of relevant industry experience hands on with pre or post silicon SOC validation. Key Skills SoC Post Silicon Validation on x86 ; SoC Failure Debug and Root-cause analysis , Power management including low power flows , Understanding of Intel system architecture.Requirements listed would be obtained through a industry relevant job experience Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.

About The Role : Linux Kernel and Device Drivers, 6 to 10 years of hands on experience Role and Responsibilities 1. Responsible for the Linux Kernel and platform software, BSPs, Drivers (Yocto, Ubuntu, RedHat, CentOS), hypervisors, Boot Loaders, Diagnostics deliverable to the customer 2. Responsible for key Linux domains:Networking, GPU/Graphics, Multimedia. Experience and Skills 1. Should have prior experience in leading a team for Linux or Board Support Package delivery for ARM-Cortex or Intel x86 based SoC architectures and evaluation boards 2. Expert in ARM Cortex architecture or Intel x86 architecture based SoC architectures with a proven experience in Uboot based bootloader and Linux kernel and device drivers development and integration 3. Should have proven experience in technically leading mid-size team of 10-15 members 4. Should have experience in leading multi-disciplinary teams working on bootloaders, kernel development, device drivers integration, validation and verification and Linux OS bring-up 5. Prior hands-on experience in developing complex device drivers like PCIe Gen 4/5, USB 2.0, USB 3.0, Ethernet, SD and eMMC is an added advantage 6. Prior hands-on experience in kernel and device drivers debugging using gcc and gdb toolchain is preferred 8. Familiarity with GIT version control tool for software versioning and release packaging is required Do - Strategy Development and Deployment - Support development of overall practice charter for the organization - Achieve talent capability improvements by creating and deploying annual plan based on business strategy, requirement analysis and emerging business realities - Determine optimal structure and roles in the team for increased efficiency and effectiveness - Program / Intervention Design and Development - Address specific practice related challenges by working with business leaders to understand the problem, designing and deploying specific programs, processes or interventions. - Drive contextualization as per unit requirements, in programs deployed - Direct future capability building within the practice by developing new programs in consultation with business leaders, academia and external parties - Increase effectiveness of existing programs, policies or processes by commissioning and overseeing program redesign and refresh - Enhance the team design and delivery capabilities by devising and implementing frameworks for program effectiveness measurement - Team Management and Development - Provide overall direction and guidance to the team for program design and delivery - Complete all people processes for the team such as performance Nxt, WLQ etc. as applicable - Build team capability by reviewing team performance and recommending learning / development intervention in consultation with the concerned teams - Support & motivate the team by - - Coaching team members to build expertise and skill within the function - Driving focus in the team by aligning them with annual plans and performance goals - Encouraging team to undertake self-development and capability building.