Technical Lead - Design Verification (SV UVM)

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Greetings from Thales India Pvt Ltd.....!

Technical Lead - Design Verification (SV UVM)

Thales India Engineering Competency Center in Bangalore is seeking Technical Lead /Senior Technical Lead role to be part of AVS/FLX FPGA design and development team. In this role, you will be responsible for FPGA Validation & Verification for Avionics products and solutions.

Responsibilities includes development of Test strategy, Virtual Verification Procedures, Test bench, BFMs, Monitors, Checkers & Virtual Verification Report as per DO254 guidelines.

Qualifications:

B.Tech/B.E or Masters in Electronics & Communication or equivalent with 8 to 12 years of relevant experience. Working experience in Defence\military\Aerospace products development is desirable

Location:

Required Skills:

Mandatory:

• Hands on in FPGA device Validation and Verification methodologies and processes.
• Experience in developing verification strategies and creating test plan based on requirements.
• Hands on Virtual Verification Environment development using VHDL and System Verilog/UVM
• Should be experienced in BFM development, monitors, checkers and Test case development using VHDL and SV/UVM
• Hands on with physical verification methodologies for various FPGA devices
• Good experience in Requirements Capture, developing Design Specification, Detailed design, Test procedure, Test report & other technical artefacts.
• Hands on experience in performing simulations using the Questasim tool.
• Should be hands on with configuration management tools such as GIT, BIT Bucket, DOORS,  GIT/BIT Bucket/ REQTIFY/DOORS
• Good experience in RTL Design using VHDL, FPGA Implementation, Testing, Integration and delivery of FPGA based hardware systems for Defense\military\Aerospace Applications.
• Experience in any scripting language for automation, such as Python, Perl or TCL
• Experienced with Jenkins for continuous integration and automation of test and build processes.
• Capable of independently managing project planning, estimation, scheduling, technical risk identification and mitigation.
• Experience in Intel, Microchip or Xilinx based FPGA/PLD will have added advantage
• Experience in Bus Interfaces - A818, A429, SPI/UART/I2C, PCIe, AXI4, A664, LVDS, DDRx
• Should be experienced with environment to work in a cross-functional and multi-national global team.

Expected to be Familiar:

• Experience in FPGA validation and verification in line with DO-254 process
• Experience in FPGA Implementation Tools (XILINX Vivado/ALTERA Libero SoC/ ALTERA Quartus).
• Experience in JIRA (Project / Issue management)
• Experience in handling Lab equipment (Logic Analyzer, Oscilloscope, Function Generators, JTAG, and In-circuit de-buggers).