Sr Engineer - RTL Design

Job Description

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a team first organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you re looking for.Responsibilities & Skills Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a team first organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you re looking for. Lattice Semiconductor is seeking a Senior Engineer- FPGA Architecture to join the Architecture team focused on FPGA architecture modeling and advance system architecture. This position is an opportunity to be part of a dynamic team with ample opportunity to contribute, learn, innovate and grow. Role specifics: This is a full-time individual contributor position located in Pune, India. The role will focus on FPGA projects concentrated in Pune and similar time zones. The qualified candidate will be working in RTL design, best-in-class coding styles, algorithms, and both Verilog and System Verilog. The qualified candidate will be working in architecture modeling and evaluation of Lattice FPGA s and Software tools to measure performance, power, and area for various workloads The qualified candidate will be expert in driving Subsystem development and ensure design meets high standards of quality and reliability, conduct regular reviews and audits The role requires working closely with Software tools team to define benchmarks, measure performance and suggest improvement areas Serve as a technical expert, providing guidance and support to other engineers. The successful candidate will be open and willing to both (a) teach best-known-methods to an existing FPGA team and (b) learn from the team about the complications of highly programmable FPGA fabrics. This role carries the need to be both a strong educator and open-minded student Accountabilities: Serve as a key contributor to build FPGA architecture modeling and evaluation platform efforts Drive logic design of key FPGA workloads and bring best-in-class methodologies to accelerate design and test time and quality. Develop the regression testing framework to execute, measure and report architecture modeling and evaluation experiments Ensuring design quality throughout project development conducting regular reviews and audits Perform architecture evaluation of competitive products Work with cross functional team including program management, Software Tools, HW architects, pre and post silicon validation to drive the program Develop strong relationships with worldwide teams. Drive continuous improvement initiatives, staying up to date with the latest industry trends and technologies Mentor and develop strong partners and colleagues Occasional travel as needed. Required Skills: BS/MS/PhD Electronics Engineering, Electrical Engineering, Computer Science or equivalent. 6+ years of experience in driving logic design across a multitude of FPGA projects. Expertise in FPGA designs, use-cases, and design considerations, defining micro-architecture and experience of working with various EDA tools Experience in leading the project throughout design cycle and working with cross organization Proven ability to work with multiple groups across different sites and time zones. Independent worker and leader with demonstrated problem-solving abilities. Proven ability to work with multiple groups across different sites and time zones.