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Silicon Design Verification Engineer

4 - 9 years

25 - 30 Lacs

Posted:1 day ago| Platform: Naukri logo

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Job Type

Full Time

Job Description

  • Bachelor's degree in Electrical Engineering, Computer Science or equivalent practical experience.
  • 4 years of experience with Design Verification.
  • Experience with System Verilog and Verification techniques.

Preferred qualifications:
  • Master's degree or PhD in Electrical Engineering or Computer Science, or a related field.
  • Experience creating/using verification components and environments in methodology (e.g., VMM, OVM, UVM).
  • Experience with scripting languages like Perl or Python.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
  • Plan the verification of complex digital design blocks by fully understanding the design specification and interacting with design verification leads and design engineers to identify important verification scenarios.
  • Create and enhance constrained-random verification environments using SystemVerilog and UVM and/or formally verify designs with SVA and industry leading formal tools.
  • Identify and write all types of coverage measures for stimulus and corner-cases.
  • Debug tests with design engineers to deliver functionally correct design blocks.
  • Close coverage measures to identify verification holes and to show progress towards tape-out.

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