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Senior Design Engineer

6 - 8 years

8 - 12 Lacs

Posted:3 months ago| Platform: Naukri logo

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Job Type

Full Time

Job Description

In this position, the candidate will be responsible for designing soft IP cores for Intel's next generation chips for different market segments. Qualifications Minimum Qualification Master of Science (or a Master of Technology) degree in Electrical Engineering with 6 years of relevant industry experience. Bachelor of Science (Bachelor of Technology) degree in Electrical Engineering with 8 years of relevant industry experience. Relevant ASIC design experience in front end processes including RTL development, Unit verification with assertions. Expertise in design, development, and integration of design blocks (IP) Expertise in Verilog and system Verilog based logic design Experience in synthesis flow and timing closure Experience in one/more of the following areas PCI, PCI_Express (RAS), AMBA standards (AXI, AHB, etc..) would prefer Knowledge of SVA and associated tools. Jasper, etc Knowledge of memory controllers and CPU architecture is a plus Looking for highly motivated individuals with the ability to deal with ambiguity Knowledge of considerations for performance, power, cost optimization, as well as design integrity for physical implementation is desirable Relevant experience in chip design with familiarity with the entire development flow from definition to Tape-Out. Good Problem-Solving Ability. Ability to work in a team environment.

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Intel
Intel

Semiconductors

Santa Clara

110,600 Employees

303 Jobs

    Key People

  • Pat Gelsinger

    Chief Executive Officer
  • David Zinsner

    Chief Financial Officer

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