Posted:2 days ago|
Platform:
Work from Office
Full Time
Experience Required:
Expertise and strong hands-on experience in RTL design using System Verilog or VHDLDigital system architecture, Processor subsystem architecture and block definitionExperience working on complex SoCsRTL design quality analysis Lint, CDC, RDCGood understanding of digital design Synthesis, DFT and Static Timing AnalysisBasic understanding of mixed-signal designsExperience with gate level simulations and debugExperience in digital verification is a plusStrong written and verbal communication skills
Immediate joiners only
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