Physical Design Engineers

As a Physical Design Engineer at our company, you will be part of a dynamic team responsible for delivering high-performance design flows for advanced SoCs in sub-10nm process technology for the mobile space. Your role will involve hands-on experience in various PnR steps such as Floor planning, Power planning, Placement & Optimization, CTS, Routing, Static timing analysis, Post route optimization, ECO implementation, and DRC closure. Additionally, you will be expected to: - Demonstrate expertise in high-frequency design and advanced tech node implementation - Utilize in-depth understanding of PG-Grid optimization for identifying high vs low current density paths, layer/via optimization, and Adaptive PDN experience - Possess comprehensive knowledge of custom clock tree design, including H-tree, SPINE, Multi-point CTS, and Clock metrics optimization - Address high placement density/congestion bottlenecks effectively - Apply expertise in PnR tool optimization for Power, Performance, and Area (PPA) enhancements - Utilize automation skills using Perl/Python and tcl for efficient design implementation - Exhibit strong communication skills and collaborate effectively in a cross-site cross-functional team environment Furthermore, the ideal candidate should hold a BTECH/MTECH degree in Electrical/Electronics/Computer Science Engineering or an equivalent field, with a minimum of 3 years of relevant experience.,