16 Hspice Jobs

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Job Overview In this highly cross functional role, you will be part of the Global Design Enablement team responsible for various aspects of PDK development across Custom, Analog and RF technology nodes. As a member of the CAD team, you will be working closely with Custom, Analog & RF Engineering design community to develop & support customized tools and flows for Schematic & Layout design, Circuit Simulation, IP characterization, Custom/Analog P&R and transistor-level EM/IR flows. You will also have the responsibility to collaborate with our Foundry and EDA partners to deploy best-in class EDA tools and flows in addition to developing in-house productivity & QoR automation solutions for improving overall design methodology. Minimum Qualifications Bachelors or masters in electrical engineering, Computer Science, or related field. 6+ years of industry experience in CAD/EDA or PDK development Knowledge of Virtuoso suite of tools- Schematic, Layout, Analog Design Environment etc. Proficiency in one or more of the programming/scripting languages- , Python, Perl and TCL. Good understanding of CMOS fundamentals and Circuit Design Concepts Strong aptitude for programming and automation Good communication skills and ability to work collaboratively in a team environment Preferred Qualifications Familiarity with SPICE simulation tools (Hspice, SpectreX/APS, AFS/Solido SPICE , PrimeSim SPICE, ADS, GoldenGate etc.) Experience with Electromagnetic tools, like Peakview and EMX, is a plus. Knowledge of FinFet & SOI processes is a plus Educational RequiredBachelor's, Electrical Engineering

Responsibilities Design and maintain standard cells for new products based on new technology. Characterize the performance of standard cells and optimize the standard cell design and layout. Characterization and modeling of Standard Cell and semi-Custom cells to provide timing/power model for verification. Quality Analysis of characterized liberty models in terms of Timing, Power and Functionality. Closely collaborate with DTCO team to work on stdcells architecture for emerging technologies. Develop automation test bench/flow/tools to improve the work efficiency and help data analysis. Co-work with international colleagues on developing new verification flows to take on the challenges in DRAM and emerging memory design. Requirements Good understanding of CMOS circuit design Good knowledge of CMOS device physics and layout Experience in any characterization tools (Siliconsmart/Liberate)and Cadence Virtuoso preferred. Experience in Primetime, Solido Analytics, ICC flow is added an advantage. Familiar with analog/digital simulation tools, i.e. HSPICE, HSIM, VerilogHDL, FINESIM, Simvision Experience in Standard Cell design and verification Experience in using Skill, TCL, Perl, Python to do test bench automation and data analysis is a plus Previous work experience in DRAM memory related fields or analog blocks is a plus. Must possess good interpersonal & communication skills and ability to work well in a team

As an ideal candidate, you are a highly motivated and experienced Analog Design Engineer with a passion for developing state-of-the-art analog sensors You have a solid background in custom analog/mixed-signal circuit design, circuit simulations, custom layout, and post-silicon characterization You thrive in a collaborative environment, guiding junior engineers, and liaising with layout teams to achieve optimal engineering solutions Your forward-thinking approach, combined with your extensive technical knowledge, enables you to tackle the unique challenges posed by various target applications You possess a b tech or M Tech degree in Electrical Engineering with 1 years of relevant industry experience or a PhD with relevant Experience Your expertise in advanced process challenges, including ESD and reliability, and your familiarity with tools like PrimeSim, FineSim, and HSPICE, set you apart as a leader in the field What Youll Be Doing: Conceptualizing, designing, and productizing state-of-the-art on-chip Process, Voltage, Temperature, Current, and Droop sensors Developing innovative solutions in the field of on-die monitoring Liaising with the layout team to achieve the best possible engineering solutions Deploying new sensors into test chips and conducting post-silicon characterization Guiding and mentoring junior engineers and tracking their work progress Collaborating with internal teams and external customers to ensure project success The Impact You Will Have: Enhancing the performance, power, area, schedule, and yield of our products Contributing to the reliability and optimization of next-generation intelligent in-chip sensors Driving innovation in on-die monitoring solutions Improving the integration process for customers, leading to faster time-to-market Providing technical leadership and mentoring to junior engineers Ensuring the successful deployment and characterization of new sensors What You'll Need: Strong technical experience in full custom analog/mixed-signal circuit design, simulations, and custom layout Tech Knowledge of custom Analog/AMS design techniques, implementation, and verification Familiarity with advanced process challenges, including ESD and reliability Experience with tools like PrimeSim, FineSim, HSPICE, and Custom Compiler or equivalent schematic layout editor tools Who You Are: A forward-thinking and design-oriented individual A team player with excellent communication, mentoring, and interpersonal skills A problem-solver who can handle moderate scope problems and analyze several factors An established professional with practical knowledge and the ability to resolve a variety of issues Someone who can work under general supervision and achieve day-to-day objectives with moderate impact

As an ideal candidate, you are a highly motivated and experienced Analog Design Engineer with a passion for developing state-of-the-art analog sensors. You have a solid background in custom analog/mixed-signal circuit design, circuit simulations, custom layout, and post-silicon characterization. You thrive in a collaborative environment, guiding junior engineers, and liaising with layout teams to achieve optimal engineering solutions. Your forward-thinking approach, combined with your extensive technical knowledge, enables you to tackle the unique challenges posed by various target applications. You possess a BTech or MTech degree in Electrical Engineering with 1+ years of relevant industry experience or a PhD with relevant experience. Your expertise in advanced process challenges, including ESD and reliability, and your familiarity with tools like PrimeSim, FineSim, and HSPICE, set you apart as a leader in the field. What You'll Be Doing: Conceptualizing, designing, and productizing state-of-the-art on-chip Process, Voltage, Temperature, Current, and Droop sensors. Developing innovative solutions in the field of on-die monitoring. Liaising with the layout team to achieve the best possible engineering solutions. Deploying new sensors into test chips and conducting post-silicon characterization. Guiding and mentoring junior engineers and tracking their work progress. Collaborating with internal teams and external customers to ensure project success. The Impact You Will Have: Enhancing the performance, power, area, schedule, and yield of our products. Contributing to the reliability and optimization of next-generation intelligent in-chip sensors. Driving innovation in on-die monitoring solutions. Improving the integration process for customers, leading to faster time-to-market. Providing technical leadership and mentoring to junior engineers. Ensuring the successful deployment and characterization of new sensors. What You'll Need: Strong technical experience in full custom analog/mixed-signal circuit design, simulations, and custom layout. Technical knowledge of custom Analog/AMS design techniques, implementation, and verification. Familiarity with advanced process challenges, including ESD and reliability. Experience with tools like PrimeSim, FineSim, HSPICE, and Custom Compiler or equivalent schematic layout editor tools.

As an ideal candidate, you are a highly motivated and experienced Analog Design Engineer with a passion for developing state-of-the-art analog sensors. You have a solid background in custom analog/mixed-signal circuit design, circuit simulations, custom layout, and post-silicon characterization. You thrive in a collaborative environment, guiding junior engineers, and liaising with layout teams to achieve optimal engineering solutions. Your forward-thinking approach, combined with your extensive technical knowledge, enables you to tackle the unique challenges posed by various target applications. You possess a BTech or MTech degree in Electrical Engineering with 1+ years of relevant industry experience or a PhD with relevant experience. Your expertise in advanced process challenges, including ESD and reliability, and your familiarity with tools like PrimeSim, FineSim, and HSPICE, set you apart as a leader in the field. What You'll Be Doing: Conceptualizing, designing, and productizing state-of-the-art on-chip Process, Voltage, Temperature, Current, and Droop sensors. Developing innovative solutions in the field of on-die monitoring. Liaising with the layout team to achieve the best possible engineering solutions. Deploying new sensors into test chips and conducting post-silicon characterization. Guiding and mentoring junior engineers and tracking their work progress. Collaborating with internal teams and external customers to ensure project success. The Impact You Will Have: Enhancing the performance, power, area, schedule, and yield of our products. Contributing to the reliability and optimization of next-generation intelligent in-chip sensors. Driving innovation in on-die monitoring solutions. Improving the integration process for customers, leading to faster time-to-market. Providing technical leadership and mentoring to junior engineers. Ensuring the successful deployment and characterization of new sensors. What You'll Need: Strong technical experience in full custom analog/mixed-signal circuit design, simulations, and custom layout. Technical knowledge of custom Analog/AMS design techniques, implementation, and verification. Familiarity with advanced process challenges, including ESD and reliability. Experience with tools like PrimeSim, FineSim, HSPICE, and Custom Compiler or equivalent schematic layout editor tools.

Looking forward towork on conceptualizing, designing and productizing state of the art Monitor IP to be used in SLM monitors realized though ASIC design flow. Work on Architecting sensing elements for on-chip Process, Voltage, Temperature, glitch and Droop monitors for monitoring silicon biometrics. You will be the part of SLM team. Individual should have strong technical experience in full custom mixed-signal circuit design, circuit simulations, working knowledge of custom layout, and pre-post-silicon characterization. Additional responsibilities include: Development of statistical simulation methodologies. Liaising with layout team to achieve best possible design solution. End to end ownership of the designed custom cells. Deployment of new circuits into test chips and post-silicon characterization Architecting new sensors and enhancing existing ones through collaboration with other architects and stakeholders. Building and refining design flows to enhance efficiency and effectiveness. Conducting pre and post-layout simulations and characterization across various design corners. Ensuring designs meet advanced finfet / GAA reliability and aging, reliability and Automotive grade requirements Working closely with the RTL, Verification and Physical Design teams for ensuing integration and Quality. Owning the product from Spec to Silicon report. Preferred skills: Strong custom design experience - specification, circuit design description and schematics. Strong understanding of device Physics and Can work independently and debug and provide circuit solutions. Hands on experience with circuit design & simulation tools, IC design CAD packages - from any EDA vendor Strong understanding of SPICE simulator concepts and simulation methods Familiar with circuit simulation tools like PrimeSim, FineSim, HSPICE or similar Must have prior experience with Custom Compiler or equivalent schematic & Layout editor tools Experience with statistical design methodology like generating and analyzing Monte-Carlo results Awareness of post-layout extraction & simulation, testing in conjunction with silicon validation Demonstrated technical expertise in the productization of advanced technologies.

Job Summary: We are seeking a highly skilled and experienced Senior Analog Circuit Design Engineer with 8+ years of industry experience in designing and validating precision analog circuits. The ideal candidate will have deep expertise in custom analog/mixed-signal IC design, low-noise and low-power design techniques, and strong analytical skills to drive innovation in next-generation electronic systems. Key Responsibilities: Lead the design, simulation, layout, and validation of analog and mixed-signal circuits (e.g., amplifiers, ADCs/DACs, regulators, PLLs, filters). Define architecture and specifications for analog sub-systems based on system requirements. Collaborate with layout engineers to optimize layout for performance, area, and manufacturability. Perform pre- and post-layout simulations (corner, Monte Carlo, noise, mismatch, etc.). Own and drive IP development from concept through silicon validation and production support. Conduct design reviews and provide mentorship to junior engineers. Work closely with cross-functional teams including digital design, verification, test, and packaging. Support silicon bring-up, debug, and characterization of analog blocks in the lab. Evaluate and select components for board-level analog circuitry when applicable. Qualifications: Bachelors or Master’s degree in Electrical Engineering or related field; Ph.D. preferred. 8+ years of hands-on experience in analog/mixed-signal IC design. Strong knowledge of CMOS/BiCMOS technologies. Expertise in using tools such as Cadence Virtuoso, Spectre, HSPICE, or similar EDA tools. Experience with silicon validation using lab equipment (oscilloscopes, spectrum analyzers, etc.). Proven track record of successful tape-outs and production-quality silicon. Excellent problem-solving and debugging skills. Strong communication and documentation abilities. Preferred Skills: Experience with analog front-end design for sensor interfaces or RF front ends. Familiarity with low-power design for portable/wearable devices. Understanding of layout techniques to mitigate parasitics, latch-up, and ESD. Knowledge of reliability and failure analysis (e.g., electromigration, hot-carrier effects). Experience with scripting languages (Python, Perl, TCL) for automation. Why Join Us? Be part of cutting-edge innovation in analog/mixed-signal technology. Work in a collaborative environment with industry veterans and emerging talent. Competitive compensation, performance bonuses, and comprehensive benefits. Career development opportunities and exposure to global projects. Interested candidates can share their resumes to shubhanshi@incise.in

General Summary: Join Qualcomm's Hardware Engineering team where innovation meets silicon. In this role, you will contribute to the design and characterization of advanced mixed-signal IPs such as DDRIOs, SERDES, ADCs, DACs, and PLLs. This position focuses on developing Verilog behavioral models and performing accurate timing and power characterization using industry-standard tools. You'll be collaborating with cross-functional teams to ensure high-quality deliverables for Qualcomm's world-class chipsets. Key Responsibilities: Develop behavioral models (Verilog, Verilog-MS/real, SystemVerilog) for mixed-signal analog IPs such as DDR-MSIP, DDRIOs, SERDES, ADC/DACs, and PLLs. Perform timing and power characterization using tools like Silicon Smart, HSPICE, FineSim, and NanoSim. Create Liberty (.lib) timing and power models and validate them against transistor-level designs. Develop and maintain self-checking testbenches and test plans for model verification. Conduct functional analysis and verification of modeled IPs using simulators like VCS. Collaborate with AMS teams for analog-digital interface verification and ensure robust modeling practices. Automate model generation and verification workflows using Tcl, Perl, or Skill scripting. Interface with design and verification teams to ensure model accuracy and completeness. Minimum Qualifications: Bachelor's degree in Electrical/Electronics Engineering, Computer Science, or related field and 3+ years of relevant hardware modeling experience OR Master's degree and 2+ years of experience OR PhD and 1+ year of experience. Required Skills & Experience: 5+ years of experience with timing/power characterization and view generation tools (e.g., Silicon Smart, HSPICE, FineSim). Strong understanding of mixed-signal analog IP design and functionality. Expertise in Verilog and Verilog-AMS behavioral modeling. Hands-on experience with simulation and verification tools such as VCS. Experience with Liberty file format and creating timing/power views. Knowledge of AMS verification environments is a plus. Strong scripting skills in Tcl, Perl, and/or Skill for automation. Excellent problem-solving, collaboration, and communication skills.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Job Overview In this highly cross functional role, you will be part of the Global Design Enablement team responsible for various aspects of PDK development across Custom, Analog and RF technology nodes. As a member of the CAD team, you will be working closely with Custom, Analog & RF Engineering design community to develop & support customized tools and flows for Schematic & Layout design, Circuit Simulation, IP characterization, Custom/Analog P&R and transistor-level EM/IR flows. You will also have the responsibility to collaborate with our Foundry and EDA partners to deploy best-in class EDA tools and flows in addition to developing in-house productivity & QoR automation solutions for improving overall design methodology. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Minimum Qualifications Bachelors or Masters in Electrical Engineering, Computer Science, or related field. 2+ years of industry experience in CAD or PDK development Knowledge of Virtuoso suite of tools- Schematic, Layout, Analog Design Environment etc. Proficiency in one or more of the programming/scripting languages- , Python, Perl and TCL. Good understanding of CMOS fundamentals and Circuit Design Concepts Strong aptitude for programming and automation Good communication skills and ability to work collaboratively in a team environment Preferred Qualifications Familiarity with SPICE simulation tools (Hspice, SpectreX/APS, AFS/Solido SPICE , PrimeSim SPICE, ADS, GoldenGate etc.) Experience with Electromagnetic tools, like Peakview and EMX, is a plus. Knowledge of FinFet & SOI processes is a plus Educational Requirements RequiredBachelor's, Electrical Engineering Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Job Summary This position is open for 2-10 years experience candidate in Qualcomm CSI (Custom/SemiCustom implementation) team Candidate will be part of CSI team working on RTL- GDS HM implementations using custom flow and methodology for custom design . Qualcomm is one of the fastest growing semiconductor organization in India making high-end Chips with the most advanced technologies. To support its growing needs, we have strong CSI team for the design, development of various highspeed and low power IPs being used in SoC. Individual has to work on RTL-GDS implementation. This will involve innovating new solutions in close collaboration with the other design teams. Job Responsibilities Job responsibilities include design and development of custom macro using Schematic design at block level (Ex RegArray, memory subsystem) Frontend verification and model generations CLP/PAGLS/LEC verifications at block level. Functional verification using spice/gatesim. Timing Signoff using PT, Candidate should be able to collaborate with different teams. Skillset/Experience 2-10 year of experience: Strong knowledge in transistor circuit design& block level logic design of Memory subsystem & Data path. STA for the design to close Set-up, Hold, MPW, Transition, etc Design verification using ESPCV & LEC, Simulation using Finesim & HSPICE. Front-end RTL Design (Verilog RTL design, System Verilog, Synopsys Design Compiler, Cadence RTL Compiler, LEC, PLDRC, Static Timing Analysis and PTPX) Physical Design using industry-standard RTL2GDS flow including Synopsys ICC2, Cadence Encounter. Scripting in Perl/Python/Shell/Tcl for productivity is a plus IP development (custom macro transistor level design, physical integration, collateral generation, flow development) and PPA quantification. Interface with Process Technology Team to understand the complex DRC and DFM requirements of the advanced technology nodes Work with cross functional teams (Architecture, Test/Verification , Product, CAD, Layout, Physical Design) to gather/define/implement specs Transistor level implementation of the block using CMOS/Domino/Cell-Based/Data path styles Implement power/clock gating techniques, Implement power/clock gating techniques, Implement industry standard as well as custom DFT techniques Implement clock distribution using custom/CTS techniques for low skew/latency/power, Implement block layout using custom/compiler techniques using custom/semi-custom/stdcell libraries Implement block level floor planning using custom and/or tiling techniques Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. The Power & Signal Integrity Group (PSIG) resides in the CHS (Central Hardware Systems) unit of Qualcomm Technologies, Inc., a leader in wireless communication technology. Engineers in the Power & Signal Integrity Group work with the various business units across Qualcomm to help bring leading edge mobile, AR\VR, IoT, Automotive and various others products to market. The candidate will work in a team-oriented environment with cross functional leads to provide electrical design expertise in the areas of signal integrity and power integrity for the design of wireless products and development systems. The engineer will be located in Bangalore, India and will be closely working with the Product architects, Platform HW teams, IO\PHY, IC Packaging, and other teams. The candidate is expected to perform SI / PI analyses and provide guidance on signal and power integrity challenges. Working effectively across organizational boundaries is essential as is the effective documentation and presentation of results. The candidate is expected to work closely with an experienced SI engineer while applying established PSIG methodologies. The engineer will have the opportunity to influence the evolution of analysis methodologies. Responsibilities Perform various IO analyses using established methodologies, potentially from model extraction through simulation and reporting of conclusions. IO types include DDR memory interfaces and variety of serial interfaces. Analyze and provide design guidance for DIE floor plans, IC packages, PCB power distribution networks using established methodologies. Document, distribute, and present results at appropriate meetings. 2+ years of work experience in the following areas: Electromagnetic theory and transmission lines Basic signal and power integrity concepts Commercial 3D electromagnetic field solver Commercial SI or RF simulation and analysis tools SPICE transient simulation including use of IBIS models The following experience is a plus: DDR and LPDDR design and analysis High speed serial IO design and analysis, PCIE, USB, UFS, CSI/DSI/MIPI Power Integrity analysis SI/PI tools :Ansys HFSS/SIwave, Cadence/Sigrity, Keysight ADS, HSPICE Spreadsheets and similar productivity tools Mentor or Cadence board design tools Education Requirements: Minimum Bachelor degree in Electrical Engineering or related discipline, Master degree preferred

We are looking for Field Application Engineer for our custom IC Verification suite of products which are deployed across more than 400+ customers worldwide and growing exponentially. In this role, you will be an Applications Engineer who will play a critical role in our Customer Success Organization enabling the success of our customers in designing advanced chips on leading-edge process technologies. You will provide technical and engineering insight and direction to improving usability, applicability, and adoption of Solido Products involving statistical analysis, Monte Carlo, cell optimization and design sensitivity for Custom analog or foundation IPs. You will have an opportunity to acquire both breadth and depth of technical knowledge, get wide exposure to the latest designs that customers are working on, and have the ability to influence at all levels, both internally and externally. Description: Use in-depth product knowledge to provide technical expertise and support for our top customers. Diagnose, troubleshoot, and resolve complex technical issues on customer designs. Work directly with Research and Development (R&D) to develop and implement our technical roadmap, specifications, and validation for improvements and enhancements Partner with customers and Sales to identify business challenges, develop effective technical solutions, and increase utilization and retention of products on current accounts Drive business for Siemens, using technical expertise and working directly with customers at the appropriate management level to establish criteria for successful engagements Behavioural Skills Required Must possess strong written, verbal and presentation skills Ability to establish a close working relationship with both customer peers and management Explore whats possible to get the job done, including creative use of unconventional solutions Key Qualifications/Experience: BE/ME EE, CS, CE or related discipline and 5-6+ years of experience Experience in circuit design and debugging skills is a big plus Good understanding of Statistical fundamentals and Monte Carlo Experience of working with Virtuoso/ADE is must Understanding of yield importance for standard cell/IO/memory and custom analog designs Experience with industry standard tools like Solido Variation aware, High Sigma monte carlo, Spectre fmc is added advantage Working knowledge of any of Spice simulators like AFS, Eldo, Finesim, Prime Sim, Hspice and Spectre is mandatory Working knowledge of scripting languages like Unix Shell, python is plus

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Job Description:- 1) Contribute/Lead towards Design and Development of Single/Multiport SRAM, Register file compilers in 7FF/5FF/3FF/2nm Technologies 2) Circuit design/simulation of key components such as bitcell, WL decoder, Sense Amplifier , Column decoder and control logic. 3) Development of critical path and characterization flow to perform detailed margin and characterization simulations of the designs . 4) Statistical Analysis of Bit-Cell , Sense Amplifier and Self Time Blocks for Compiler Target yield Sign-Off 5) Design Tuning /optimizations , Margin Analysis and Sign-Off for Complete Compiler to meet Yield and Performance targets. 6) Logic simulations and detailed timing analysis of key paths in high speed memory design. 7) Coordinations among various team members design team, modeling team, layout team and verification team. Skill Sets Needed: 1) Expertise of high speed/low power CMOS circuit design , clocking scheme, Static and dynamic logic circuits 2) Experience in Designing and Driving one or many Memory Compilers Specifications to final release 2) Complete hands on experience in using Cadence/Mentor schematic/layout editor tools 3) Complete hands on experience with Circuit simulation, MC analysis and waveform viewer tools such as HSPICE, HSIM, XA, FinSim, XARA, nWave, WV etc 6) Experience in Skill/Perl/Python Scripting is a strong plus 7) Experience in Understanding the layout design issues and process issues/limitation in FINFET is a Plus Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, gender identity, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law. If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Job Description:- 1) Contribute/Lead towards Design and Development of Single/Multiport SRAM, Register file compilers in 7FF/5FF/3FF/2nm Technologies 2) Circuit design/simulation of key components such as bitcell, WL decoder, Sense Amplifier , Column decoder and control logic. 3) Development of critical path and characterization flow to perform detailed margin and characterization simulations of the designs . 4) Statistical Analysis of Bit-Cell , Sense Amplifier and Self Time Blocks for Compiler Target yield Sign-Off 5) Design Tuning /optimizations , Margin Analysis and Sign-Off for Complete Compiler to meet Yield and Performance targets. 6) Logic simulations and detailed timing analysis of key paths in high speed memory design. 7) Coordinations among various team members design team, modeling team, layout team and verification team. Skill Sets Needed: 1) Expertise of high speed/low power CMOS circuit design , clocking scheme, Static and dynamic logic circuits 2) Experience in Designing and Driving one or many Memory Compilers Specifications to final release 2) Complete hands on experience in using Cadence/Mentor schematic/layout editor tools 3) Complete hands on experience with Circuit simulation, MC analysis and waveform viewer tools such as HSPICE, HSIM, XA, FinSim, XARA, nWave, WV etc 6) Experience in Skill/Perl/Python Scripting is a strong plus 7) Experience in Understanding the layout design issues and process issues/limitation in FINFET is a Plus Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, gender identity, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law. If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. Experience Required:6+ Years (A must) Strong expertise in STA timing analysis basics, AOCV/POCV concepts, CTS, defining and managing timing constraints, Latch transparency handling, 0-cycle, multi-cycle path handling Hands-on experience with STA tools - Prime-time, Tempus Have experience in driving timing convergence at Chip-level and Hard-Macro level In-depth knowledge cross-talk noise, Signal Integrity, Layout Parasitic Extraction, feed through handling, Knowledge of ASIC back-end design flows and methods and tools (ICC2, Innovus) Knowledge of Spice simulation Hspice/FineSim, Monte Carlo. Silicon to spice model correlation. Proficient is scripting languages- TCL, Perl, Awk Basic knowledge of device phy STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs Qualcomm Hexagon DSP IP's . Timing analysis, validation and debug across multiple PVT conditions using PT/Tempus. Run Primetime and/or Tempus for STA flow optimization and Spice to STA correlation. Evaluate multiple timing methodologies/tools on different designs and technology nodes. Work on automation scripts within STA/PD tools for methodology development. Good Technical writing and Communication skills, should be willing to work in cross-collaborative environment Experience in design automation using TCL/Perl/Python. Familiar with digital flow design implementation RTL to GDS :ICC, Innovous , PT/Tempus Familiar with process technology enablement:Circuit simulations using Hspice/FineSim, Monte Carlo. Applicants :Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies :Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Description Job Description Summary As a Senior Base STD Characterization Engineer, you will work in a highly innovative, motivated, young, and dynamic design team capable of verifying complete products using state of the art STD Cells , Custom Cells on latest CMOS process technology Job Description Responsibilities * Silicon smart based STD cell characterization experience. * Writing vector/ARC for STD Cells Responsibilities for hspce (hspice/spectre) based characterization. Circuit understanding * Basic building blocks - AND , NAND , NOR , latches , flops design understanding Block level circuit simulation , Analysis capability * STD cell timing checks - linearity , monotonicity , QA experience Analysis of Circuits , Timing concepts schematic analysis Collaborate closely with design and verification team members spread across the globe, many of whom have decades of experience in memory design. Opportunities to work closely with cross functional groups such as Product Engineering and Design Architecture. May also review vendor capability to support product development. 3-5 years of experience