FPGA Verification Lead

Capgemini Technology Services India Limited

6 - 12 years

4 - 8 Lacs

bengaluru karnataka india

Posted:1 day ago| Platform: Foundit logo

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Skills Required

systemverilog uvm

Work Mode

On-site

Job Type

Full Time

Job Description

Scope of work

Lead and own the RTL verification of FPGA-based designs from concept to tape-out
Define and drive FPGA verification plans and testbenches (System Verilog/UVM).
Collaborate with design engineers to understand architecture and micro-architecture specifications
Perform functional coverage analysis, regression testing, and debug failures.
Mentor and lead verification engineers.

Domain Expertise

Experience with FPGA platforms such as Xilinx and Intel (Altera), including AXI-based design integration and verification of high-speed interfaces like PCIe, DDR, and Ethernet.
Skilled in developing verification IPs and performing validation on FPGA platforms.
Strong command of SystemVerilog, UVM, and industry-standard simulation tools such as QuestaSim and VCS.
Expertise in building self-checking verification environments using VHDL/Verilog, including BFMs, checkers, monitors, and scoreboards.
Solid understanding of HDL languages including Verilog, VHDL, and SystemVerilog.
Proficient in automation scripting using languages like Perl, Tcl, or Python.

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