DFT-Engineer

Careernet

4 - 9 years

30 - 45 Lacs

bengaluru

Posted:1 week ago| Platform:

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Skills Required

scan insertion dft atpg dft design

Work Mode

Hybrid

Job Type

Full Time

Job Description

Key Skills:

Roles and Responsibilities:

Develop and implement DFT strategies including scan compression and insertion, Memory BIST, and Logic BIST.
Conduct at-speed testing and fault simulation to ensure product quality.
Perform back-annotated gate-level verification and silicon debug.
Utilize Verilog RTL, TCL, and/or Perl for coding tasks.
Work proficiently in Unix/Linux environments.
Collaborate with cross-functional teams to integrate DFT solutions into designs.
Stay updated with industry standards such as IEEE 1149, 1500, 1687, and 1838.
Engage in continuous learning and application of new DFT methodologies and tools.

Skills Required:

Strong expertise in DFT methodologies, including scan insertion and ATPG.
Hands-on experience with MBIST, Logic BIST, and at-speed testing.
Proficient in Verilog RTL coding and scripting using TCL and/or Perl.
Experience in back-annotated gate-level verification and silicon debug.
Familiarity with Unix/Linux environments for design and verification tasks.
Knowledge of industry standards such as IEEE 1149, 1500, 1687, and 1838.
Ability to collaborate with cross-functional teams for seamless integration of DFT solutions.
Continuous learning mindset to stay updated with new DFT tools and methodologies.

Education:

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