DFT SMTS Silicon Design Engineer Advanced Micro Devices (AMD)

12.0 - 17.0 years

14 - 19 Lacs

Delhi, India

On-site

THE ROLE: AECG SSD ASIC is a centralized ASIC design group within AMD s Adaptive and Embedded Computing Organization. The group consists of design teams located in several AMD locations in North America and Asia. It is primarily responsible for architecture, design, and implementation of critical Design-for-Test (DFT) and Design-for-Debug (DFD) features for cutting edge AMD products. As a member of the AECG SSD ASIC Group, you will help bring to life cutting-edge designs. As a member of the DFT design/integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success. THE PERSON: A successful candidate ...

Posted 1 month ago

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Senior Manager, DFT Design Analog Devices

12.0 - 15.0 years

12 - 15 Lacs

Bengaluru, Karnataka, India

On-site

Lead and manage the DFT team responsible for delivering comprehensive DFT solutions for complex SoCs. Take end-to-end ownership of the DFT lifecycle - from architecture definition to silicon bring-up and production ramp. Collaborate cross-functionally with architecture, design, and physical design teams to ensure optimal testability integration. Define and track DFT milestones, quality metrics, and progress, ensuring alignment with program schedules and quality standards. Represent DFT in program and customer meetings, communicating status, risks, and mitigation plans. Architect and guide the implementation of DFT features, including Scan chain insertion and optimization, Test compression te...

Posted 2 months ago

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DFT Engineer Careernet

3.0 - 8.0 years

30 - 45 Lacs

Bengaluru

Work from Office

Key Skills: Design Engineer, EJTAG Roles and Responsibilities: DFT architecture development and implementation ATPG, MBIST, and EJTAG-based test insertion and verification Pattern generation and coverage improvement Post-silicon debug and yield analysis Collaboration with STA and Physical Design teams for timing closure in DFT modes Potential interaction with external customers Supervise or guide team members as needed Skills Required: In-depth knowledge of DFT concepts Hands-on experience in ATPG, MBIST, and JTAG Experience in DFT insertion, pattern generation, vector simulation, and coverage improvement Strong debugging and problem-solving abilities Proficiency in scripting (Perl, Shell, e...

Posted 3 months ago

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DFT Technical Lead Cyient

10.0 - 20.0 years

35 - 90 Lacs

Hyderabad, Bengaluru

Work from Office

As a DFT Technical Lead , you will be responsible for overseeing the DFT implementation and verification activities for complex SoCs/ASICs, collaborating with cross-functional teams and architects. Your role will involve leading teams technically, providing training and mentoring, and interfacing with customers. Under general supervision, you will engage in engineering work, applied research, and the development/design of new integrated chips, including architectural design, logic design, circuit design, physical design, verification, fabrication, and packaging. Roles & Responsibilities: Hands-on expertise in Full Chip SCAN , Compression , MBIST , ATPG , and other DFT-related skills. Over 10...

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