2488 Automotive Jobs - Page 6

HELLA is a listed, internationally positioned automotive supplier operating under the umbrella brand FORVIA. Within this de facto group, HELLA stands for high-performance lighting technology and automotive electronics. At the same time, the Company covers a broad service and product portfolio for the spare parts and workshop business as well as for manufacturers of special-purpose vehicles with its Lifecycle Solutions business group. HELLA has around 36,000 employees at more than 125 locations worldwide and generated consolidated sales of 6.3 billion in the fiscal year 2021/2022. Creating finite element models of various parts based on the type of simulation, assembling the same with respect to various types of simulation. Running finite element model in various environment for checking its feasibility in structural and/or thermal domain. Writing reports for summarizing the analysis results and reviewing all project-related analysis requirements for ensuring the accuracy of project reports. Able to perform Hyper mesh meshing (Shell and tetrahedral), performing quality checks. Validation of the calculation models with test engineers. Preparing & conducting internal & external presentations, taking into account the objectives of respective work areas. YOUR QUALIFICATIONS Graduate / Postgraduate degree in mechanical engineering, production engineering or any other relevant degree in the field of mathematics / engineering Minimum three years experience in using FEA software like Hyper works (Hyper Mesh, HyperView, Hypergraph), Abaqus, Excel, etc Knowledge of using various modeling methodology. Basic knowledge of FEA skills like optimization, dynamic, transient, and non-linear analysis. Basic knowledge of plastic, hyperplastic materials used in automotive components. Able to use hand calculation to validate design and simulation results Good communication skills and experience in interacting with global customers

Praxien Tech Private Limited is looking for BIW Fixture Design Engineer to join our dynamic team and embark on a rewarding career journey Create and develop technical drawings and specifications for new products or product improvements Research and analyze data to determine customer needs and requirements Develop and produce D models using computer-aided design (CAD) software such as SolidWorks, AutoCAD, or CATIA Produce detailed drawings and specifications for parts and assemblies Collaborate with other members of the product development team to ensure that designs are manufacturable, cost-effective, and meet customer requirements Conduct design reviews and make necessary revisions to designs Excellent analytical and problem-solving skills Strong communication and interpersonal skills

Senior Staff Engineer - Embedded Software Design: Looking for an experienced engineer which Roles and Responsibilities: (1) System / design architecture, Development of middleware frameworks, and understand about device drivers for ADAS/AD, Gateway, Cockpit/IVI that bring out the potential of Renesas SoC products. (2) Requirements definition of middleware and drivers. (3) Development of demo of developed software and promotion to customers. (4) Market trend research for new solution. (5) W/W customer discussion. Essential Functions: Experienced in all aspects of Software Design / Development / Verification / Validation from module level to full system with a demonstrated history in driving design innovation and best practices, such as, task/job scheduling with prioritization, dependencies, pairing in embedded system, multi-process, multi-core, multi-device operation and communication, OS IPC, memory resource management (e. g SMMU/IOMMU) and and FFI concept (freedom from interference) in embedded system. Experienced in Linux, Android, QNX, FreeRTOS SW development and familiar with standard frameworks, such as, Linux / KMS / DRM / Wayland / V4L2 / libcamera / GStreamer , Android/SurfaceFlinger/Window Manager/CODEC, QNX/Screen/Sensor Camera framework. Strong knowledge of Video input and output pipeline, such as, Camera input standard (MIPI-CSI2, Serializer/Deserializer), Image processing, Display output standard. Experience in developing multimedia SW such as audio (AAC, MP3) encode/decode, video (H264, H265) encode/decode, OMX standard. Deep knowledge of SYCL and/or OpenVX/OpenCV. Familiarity with OpenGLES, OpenCL, Vulkan, or CUDA(nice to have). Experience in designing and implementing image/video processing pipelines on embedded SoCs (e. g. , using DSP, NPU, GPU). Proficient in C++14/17 and familiarity with parallel computing. Experience working with cross-platform embedded systems (e. g. , QNX, Linux, FreeRTOS, Android) Experienced in SW development process: ISO26262, Automotive SPICE, CMMI, Agile/Scrum with Project manager, Project Leader, Scrum master, Safety manager roles. Should have the ability to work independently with little supervision to design complex SW and take complete ownership to drive all aspects within the committed schedule. Must be proficient in architecture, unit level design and implementation. Experience in leading a team with a proven history of mentoring and promoting new college graduates Qualifications Qualifications Minimum Requirements: University degree graduate or above majoring in Electronics, Telecommunications, Mechatronics, Automation, Computer Science, Computer Engineering, Information Technology, Mathematics - Computer Science, Physics - Electronics, and Physics - Computer Science For Senior Staff Engineer, Minimum of 7 years of experience in software For Principal Engineer, Minimum of 15 years of experience in software

Senior Staff Engineer - Embedded Software Design: Looking for an experienced engineer which Roles and Responsibilities: (1) System / design architecture, Development of middleware frameworks, and understand about device drivers for ADAS/AD, Gateway, Cockpit/IVI that bring out the potential of Renesas SoC products. (2) Requirements definition of middleware and drivers. (3) Development of demo of developed software and promotion to customers. (4) Market trend research for new solution. (5) W/W customer discussion. Essential Functions: Experienced in all aspects of Software Design / Development / Verification / Validation from module level to full system with a demonstrated history in driving design innovation and best practices, such as, task/job scheduling with prioritization, dependencies, pairing in embedded system, multi-process, multi-core, multi-device operation and communication, OS IPC, memory resource management (e. g SMMU/IOMMU) and and FFI concept (freedom from interference) in embedded system. Experienced in Linux, Android, QNX, FreeRTOS SW development and familiar with standard frameworks, such as, Linux / KMS / DRM / Wayland / V4L2 / libcamera / GStreamer , Android/SurfaceFlinger/Window Manager/CODEC, QNX/Screen/Sensor Camera framework. Strong knowledge of Video input and output pipeline, such as, Camera input standard (MIPI-CSI2, Serializer/Deserializer), Image processing, Display output standard. Experience in developing multimedia SW such as audio (AAC, MP3) encode/decode, video (H264, H265) encode/decode, OMX standard. Deep knowledge of SYCL and/or OpenVX/OpenCV. Familiarity with OpenGLES, OpenCL, Vulkan, or CUDA(nice to have). Experience in designing and implementing image/video processing pipelines on embedded SoCs (e. g. , using DSP, NPU, GPU). Proficient in C++14/17 and familiarity with parallel computing. Experience working with cross-platform embedded systems (e. g. , QNX, Linux, FreeRTOS, Android) Experienced in SW development process: ISO26262, Automotive SPICE, CMMI, Agile/Scrum with Project manager, Project Leader, Scrum master, Safety manager roles. Qualifications Qualifications Minimum Requirements: University degree graduate or above majoring in Electronics, Telecommunications, Mechatronics, Automation, Computer Science, Computer Engineering, Information Technology, Mathematics - Computer Science, Physics - Electronics, and Physics - Computer Science For Senior Staff Engineer, Minimum of 7 years of experience in software For Principal Engineer, Minimum of 15 years of experience in software

About Us Observe.AI is transforming customer service with AI agents that speak, think, and act like your best human agents helping enterprises automate routine customer calls and workflows, support agents in real time, and uncover powerful insights from every interaction. With Observe.AI , businesses boost automation, deliver faster, more consistent 24/7 service and build stronger customer loyalty. Trusted by brands like Accolade, Prudential, Concentrix, Cox Automotive, and Included Health, Observe.AI is redefining how businesses connect with customers driving better experiences and lasting relationships at every touchpoint. The Opportunity The security team at Observe is responsible for securing our application platform, cloud infrastructure, and IT systems to protect Observe and its 60 million Community members. As a Senior Infrastructure Security Engineer, you will collaborate closely with other security, cloud infrastructure, SRE, Engineering Development team members and other stakeholders to design and harden infrastructure, network, systems and access, implementing security best practices. What you ll be doing Function as the Subject matter expert for Systems, Network and Cloud Security. Support existing Cloud and Corporate Infrastructure security tools and propose improvements. Augment the On-shore Infrastructure security team-related activities to utilise follow-the-sun model. Lead an engineering team to develop platforms and systems to support IAM/PAM. Enhance OS, Systems-related security best practices, including Vulnerability, Patch Management, Forensics, Endpoint Detection and Response. Deploy and streamline role-based access control (RBAC), break glass methods, authentication/authorisation into environments, and implement migration paths for existing services. Define and implement a consistent pattern for the definition of access controls, integrate and manage a single source of identity. Develop, document System and IT security reference architectures, design patterns, roadmaps, and other architectural artefacts aligned with policies, standards and industry best practice. Leverage the structure of compliance frameworks (Eg MITRE, NIST, ISO 27001) to identify and implement necessary security controls. Automate security incident detection and response using scripting languages. What you bring to the role 3-4 Years of hands-on experience across Systems, Network security and Cloud Security Strong team player, communication and documentation skills are required Deep understanding and expertise in Enterprise Corporate IT and Production Cloud Infrastructure, Systems, Hardware and OS Experience in Corporate IT security across IAM, Endpoint and other employee endpoint solutions Industry Certifications in Security, Systems and Network preferred Infrastructure Scripting and automation experience preferred (Python, Ansible, Powershell, Terraform, Jenkins) Experience with building IAM/PAM infrastructure entities- Federated Single Sign-On, SAML, etc Experience securing, designing and implementing large-scale distributed cloud systems, including but not limited to: Operating systems (such as RHEL, Ubuntu, CentOS, Mac, Windows, etc.) Container management solutions (e.g. Docker, Kubernetes, AKS, ECS) Containerisation and virtualisation technologies (e.g. containerd, Docker, VMWare) Automation and configuration management (e.g. CFEngine, Jenkins, Puppet, Ansible) Experience in rolling out security controls across the workforce, including understanding of security objectives, operational objectives, and trade-offs. Experience designing and implementing Cloud security architecture What you can expect Excellent medical insurance options and free online doctor consultations Yearly privilege and sick leaves as per Karnataka S&E Act Generous holidays (National and Festive) recognition and parental leave policies Learning & Development fund to support your continuous learning journey and professional development Fun events to build culture across the organization Flexible benefit plans for tax exemptions (i.e. Meal card, PF, etc.) Our Commitment to Inclusion and Belonging Observe.AI is an Equal Employment Opportunity employer that proudly pursues and hires a diverse workforce. Observe AI does not make hiring or employment decisions on the basis of race, color, religion or religious belief, ethnic or national origin, nationality, sex, gender, gender identity, sexual orientation, disability, age, military or veteran status, or any other basis protected by applicable local, state, or federal laws or prohibited by Company policy. Observe.AI also strives for a healthy and safe workplace and strictly prohibits harassment of any kind. We welcome all people. We celebrate diversity of all kinds and are committed to creating an inclusive culture built on a foundation of respect for all individuals. We seek to hire, develop, and retain talented people from all backgrounds. Individuals from non-traditional backgrounds, historically marginalized or underrepresented groups are strongly encouraged to apply. If you are ambitious, make an impact wherever you go, and youre ready to shape the future of Observe.AI, we encourage you to apply. For more information, visit www.observe.ai .

Roles and Responsibilities Should have experience in Automotive Requirements. Source candidates through various channels such as job boards, social media, employee referrals, and networking events. Conduct initial screening calls with potential candidates to assess their suitability for the role. Coordinate interviews between clients and candidates, ensuring timely scheduling and communication. Manage candidate pipeline by tracking progress, updating status reports, and maintaining accurate records. Provide regular updates on recruitment activities to stakeholders.

We are seeking AI Software Engineers to join our AI Systems team. The ideal candidate will have industry experience working on machine learning, data science or computer vision topics. The position will involve taking these skills and applying them to solve some of the key issues facing the self-driving vehicle industry and advanced safety systems. Our mission is to use the latest machine learning and AI inference networks to develop the best AI inference for self-driving vehicle and advanced driver safety engineers. Renesas is the leading automotive electronics supplier globally, and this is a rare opportunity to deploy your AI software to the billions of devices we ship to customers every year. You will join our High Performance Computing (HPC) AI Solutions global research and development organization of around 100 software engineers. Responsibilities Design, develop, deploy, and maintain AI software for our self-driving vehicle customers. Leverage cloud native technologies and environments (GitHub/GitLab, Terraform, Docker, Kubernetes etc) to deploy our products on our multiple hardware devices (CPU, AI accelerator etc). Design the implementation and management of our AI solutions using the latest optimized machine learning technologies to make our internal and customer engineer s life easier and meet their AI workflow needs. Develop novel algorithms and approaches to advance the state of the art of AI-accelerated inference solutions Working in a globally distributed team and deliver the software product as a team in an agile development schedule Qualifications Qualifications Bachelor s or Master s degree in computer science, machine learning, mathematics, physics, electrical engineering or related field. Experience in C/C++, Python, or other related programming language for atleast 2 years professionally. Having individual project repositories in github etc can be an added advantage Atleast 2 years experience with software engineering, including deploying to one or more embedded devices or platforms. 2 years experience deploying applications with machine learning, data science or AI frameworks (eg TensorFlow/Keras, PyTorch, Pandas, ONNX), and ML tools (eg Weights and Biases, MLFlow, Airflow). Having previously worked with transformer type networks with know-how of attention blocks design and optimization in any hardware will be an added advantage. Familiarity with opens source AI compiler tools such as Apache TVM and prior experience in concepts like quantization, pruning etc and IR lowering during AI model compilation. Familiar with concepts of applications using cloud technologies (eg Kubernetes, Docker) and deployed to one or more cloud providers (eg Amazon Web Services, Microsoft Azure, Google Cloud) Ability to speak and write in English at a business level Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21, 000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.

We are seeking a highly skilled experienced PDN PV expert to join our Flows Methodologies Team. This role requires strong analytical skills, attention to detail, and the ability to work collaboratively with cross-functional teams. Proficiency in relevant EDA tools and a solid understanding of digital design principles are essential for success in these positions Scope of Responsibilities: As part of the Design Enablement team of the organization, you need to work closely with SoC cross functional teams to develop and define PDN PV flow methodology to meet SoC IP level objectives on low geometry nodes (3/5/16nm) Your scope of work will cover tools and flows definition, requirement management for SoC designs You will work with EDA Vendors to proactively review latest tools and flows offerings in PDN PV domains. Evaluate latest offerings and benchmark with organization used tools, flows, and methodologies. You will be an actor of change for deploying new tools methodologies across the organization Qualifications Bachelor or Master or Ph. D. in Electronics Engineering and specialization in VLSI domain 10-15 years of hands-on experience in PDN (IR Drop EM analysis) PV (Physical Verification) domains Experience on PDN PV Signoff on lower tech-nodes Ability to debug PV issues (LVS, DRC, ERC, ANTENNA, ESDLUP etc) IR-EM-Power issues independently Ability to drive PDN PV methodology automation Strong scripting skills for Automation and Flow development using PERL/TCL/Python. Can - do attitude, openness to new environment, people and culture Strong communication skills (written and verbal), problem solving, attention to detail, commitment to task, and quality focus Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world-leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21, 000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.

Location: NOIDA Exp-7-15Y We are seeking a highly skilled experienced Synthesis Static Timing Analysis (STA) expert to join our Flows Methodologies Team. This role requires strong analytical skills, attention to detail, and the ability to work collaboratively with cross-functional teams. Proficiency in relevant EDA tools and a solid understanding of digital design principles are essential for success in these positions Scope of Responsibilities: As part of the Design Enablement team of the organization, you need to work closely with SoC cross functional teams to develop and define Synthesis STA flow methodology to meet SoC IP level objectives on low geometry nodes (3/5/16nm) Your scope of work will cover tools and flows definition, requirement management for SoC designs You will work with EDA Vendors to proactively review latest tools and flows offerings in Synthesis STA domains. Evaluate latest offerings and benchmark with organization used tools, flows, and methodologies. You will be an actor of change for deploying new tools methodologies across the organization Qualifications Bachelor or Master or Ph. D. in Electronics Engineering and specialization in VLSI domain Good understanding of RTL, Synthesis, LEC, VCLP, Timing Constraints, UPF, Timing Closure Signoff Experience with EDA tools like Genus, Fusion Compiler, Primetime, Tempus, Conformal Strong scripting skills for Automation and Flow development using PERL/TCL/Python. Can - do attitude, openness to new environment, people and culture Strong communication skills (written and verbal), problem solving, attention to detail, commitment to task, and quality focus Ability to work independently and as part of a team Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21, 000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.

We are seeking a highly skilled experienced engineer with SDC/RDC/CDC skills to join our Flows Methodologies Team. This role requires strong analytical skills, attention to detail, and the ability to work collaboratively with cross-functional teams. Proficiency in relevant EDA tools and a solid understanding of digital design principles are essential for success in these positions Scope of Responsibilities: As part of the Design Enablement team of the organization, you need to collaborate with design and verification teams to implement robust CDC/RDC solutions into organization standard flows You will work with EDA Vendors to proactively review latest tools and flows offerings in this domain evaluate latest offerings and benchmark with organization used tools, flows, and methodologies You will be an actor of change for deploying new tools methodologies across the organization Qualifications Specific skills knowledge : Bachelor or Master or Ph. D. in Electronics Engineering and specialization in VLSI domain 6-10 Years of Experience Expertise in RTL Level checks understanding Expertise in CDC verification tools like Mentor Graphics Questa CDC and Synopsys SpyGlass CDC Expertise in utilizing tools like Synopsys Prime Time, Cadence Tempus, and Mentor Graphics for timing analysis Expertise in utilizing RDC verification tools and methodologies to identify and resolve reset-related issues. Strong scripting skills for Automation and Flow development using PERL/TCL/Python. Can - do attitude, openness to new environment, people and culture Strong communication skills (written and verbal), problem solving, attention to detail, commitment to task, and quality focus Ability to work independently and as part of a team Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world-leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21, 000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.

Analog and Connectivity Business Unit (AC) is looking for a Staff Product Engineer to join our team to drive the product development of state-of-the-art Sensor Signal Conditioning products. This is a unique and exciting opportunity to work with a cross-functional team to bring a product to volume production starting from product conception to production release. The job scope includes but is not limited to, development of the test plan to ensure datasheet specifications are met. Own the qualification plan and the execution to comply with various JEDEC/AEC quality standards. Own product quality assessment through reliability tests. Collaborate with multi-functional teams such as Design, Test, Applications and Failure Analysis teams during first silicon debug and to root cause field failures. Creation and maintenance of product BOM. Monitor production data to address yield and quality deficiencies using statistical analysis. KEY RESPONSIBILITIES Full PE product lifecycle ownership from concept to end of life with a focus on ensuring the delivery of the highest quality products to our end customers Definition of ATE test, qualification and manufacturing plans Product release into manufacturing with adherence to stringent tier 1-customer requirements Datasheet and automotive compliance reports Real time customer support for design, product and quality related issues Temperature/Voltage/Process characterization and production limit setting Product new product introduction and yield ownership Product BOM release and maintenance Excursion management for both suppliers and customers Use commercially available yield tools for yield improvement and monitoring, generate weekly reports and review with PE teams KPI achievement in product related deliverables including NPI execution and velocity, product cost (Gross margin improvements), product quality performance and failure analysis cycle times PAT, SYL, SBL, SPC limit and disposition optimizations to protect quality without excessive waste Qualifications 12+ years experience in product engineering. A strong analog circuit background is a must. Familiarity with ATE tester platforms (eg. Advantest 93K) Knowledge of analog and mix-signal circuitry and the common building blocks, device physics, test methodology and DFT knowledge Experience with common lab test equipment (DC power supply, oscilloscope, multi-meters etc). Bench characterization experience is a plus Familiarity with JEDEC/AEC qualification standards and stress test conditions. Experience with qual hardware/software development would be preferred Experience in yield management tools such as Spotfire, JMP. Apply statistical analysis to isolate the issue and make data-driven decisions Ability to managing supplier excursions and customer escalations through problem solving Knowledge of Semiconductor Failure Analysis is preferable Strong verbal and written communication skills A good team player. Effective in fast paced, dynamic work environment EDUCATION: BS in Electrical/Electronic Engineering MS in Electrical/Electronic Engineering is preferred Company Description Renesas is a global semiconductor company providing hardware and software solutions for a range of cutting-edge technologies including self-driving cars, robots, automated factory equipment, and smart home applications. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas is a global, multi-billion dollar, publicly traded company headquartered in Japan, and has subsidiaries in 20 countries worldwide. Renesas is a dynamic, multi-cultural technology company where employees learn, mentor, innovate and thrive. Renesas is extending our share in fast-growing data economy-related markets such as infrastructure and data center and strengthening our presence in the industrial/IOT and automotive segments. Our solutions drive products developed by major innovators around the world. Join us and build your future by being part of what s next in electronics.

As a Senior Staff Software Engineer - ADAS Autonomous Driving, your mission is to make the R-Car software platform the easiest and most effective automotive platform for software development, verification, and validation in ADAS and autonomous driving systems. In this role, you will design, develop, optimize, and integrate critical software components for our R-Car SoC platform. This is an excellent opportunity to work collaboratively with cross-functional teams including middleware software and system engineering experts to deliver high-performance, robust solutions that meet the real-time processing demands of automotive applications. Qualifications Key Responsibilities Software Development Design and implement robust drivers and application code for the R-Car SoC platform using C/C++ Participate in full development cycles: Requirements development and analyze, Architecture design, Unit Design, Coding, Unit Verification, Integration Verification, System Verification and System Validation Adhere to industry standards for maintainable, high-quality code. in requirements development, design reviews, and code walkthroughs. System Integration Collaborate closely with system engineering and middleware software teams to integrate, validate, and optimize software on the R-Car hardware platform. Contribute to system integration design and implement testing procedures to ensure seamless communication between hardware and software components. Performance Optimization Analyze and optimize software performance, ensuring efficient use of system resources. Conduct performance verification, result analysis, and implement design improvements to meet stringent real-time processing requirements. Debugging and Testing Perform comprehensive debugging and troubleshooting to resolve software issues. Develop and execute unit tests and system-level verification to validate and improve software reliability on the R-Car platform. Team Collaboration and Communication Work within an international team environment, liaising with multiple stakeholders to align on project objectives. Maintain clear documentation of designs, test procedures, and problem resolutions.

Full PE product lifecycle ownership from concept to end of life with a focus on ensuring the delivery of the highest quality products to our end customers Definition of ATE test, qualification and manufacturing plans Product release into manufacturing with adherence to stringent tier 1-customer requirements Datasheet and automotive compliance reports Real time customer support for design, product and quality related issues Temperature/Voltage/Process characterization and production limit setting Product new product introduction and yield ownership Product BOM release and maintenance Excursion management for both suppliers and customers Use commercially available yield tools for yield improvement and monitoring, generate weekly reports and review with PE teams KPI achievement in product related deliverables including NPI execution and velocity, product cost (Gross margin improvements), product quality performance and failure analysis cycle times PAT, SYL, SBL, SPC limit and disposition optimizations to protect quality without excessive waste REQUIREMENTS: 7+ years experience in product engineering. A strong analog circuit background is a must. Familiarity with power management IC testing would be a plus Familiarity with ATE tester platforms (eg. Teradyne J750, Advantest 93K) Knowledge of analog and mix-signal circuitry and the common building blocks, device physics, test methodology and DFT knowledge Experience with common lab test equipment (DC power supply, oscilloscope, multi-meters etc). Bench characterization experience is a plus Familiarity with JEDEC/AEC qualification standards and stress test conditions. Experience with qual hardware/software development would be preferred Experience in yield management tools such as PDF Exensio, JMP. Apply statistical analysis to isolate the issue and make data-driven decisions Ability to managing supplier excursions and customer escalations through problem solving Knowledge of Semiconductor Failure Analysis is preferable Strong verbal and written communication skills A good team player. Effective in fast paced, dynamic work environment Qualifications BS in Electrical/Electronic Engineering MS in Electrical/Electronic Engineering is preferred Company Description Renesas is a global semiconductor company providing hardware and software solutions for a range of cutting-edge technologies including self-driving cars, robots, automated factory equipment, and smart home applications. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas is a global, multi-billion dollar, publicly traded company headquartered in Japan, and has subsidiaries in 20 countries worldwide. Renesas is a dynamic, multi-cultural technology company where employees learn, mentor, innovate and thrive. Renesas is extending our share in fast-growing data economy-related markets such as infrastructure and data center and strengthening our presence in the industrial/IOT and automotive segments. Our solutions drive products developed by major innovators around the world. Join us and build your future by being part of what s next in electronics.

Manage multiple new products through their full product lifecycle, Product Compliance to Sustainment of production released parts Generate Characterization, Qualification, Bench-to-ATE Correlation and Test Limit plans for new products based on REA guidelines and JEDEC standards Drive measurements/data collection and statistical analysis for Characterization, Qualification, Correlation, Production Test Limit setting, and any other specialized testing for datasheet parameters Cost reduction via yield improvement and test time reduction from safe launch study at both NPI and MP stage. Excursion management (Low yield and RMAs) and MRB lot disposition. Work with DE/TE team to design and implement production test solutions. Continually look for opportunities to improve the NPI process. Focus areas include streamlining Test, Qualification and Characterization plans and strategies, reducing documentation overhead, and leveraging NPI efficiencies such as Qualification by Similarity (QBS) Be a mentor to junior Product Engineering team members to accelerate their technical and career growth Contribute technical expertise to business critical projects as required to advance MID (Memory Interface Division) business objectives Qualifications Preferred with 10+ years experience from Product Engineer, Quality Engineer, Test Engineer, Validation Engineer and FA Engineer in fabless. Deep knowledge of Digital / Analog Product Characterization Technique. Hands-on experience to work on Characterization Plan, PVT test, Report. Strong statistical data analysis background for NPI/MP products. Hands-on experience from PDF (TIBCO Spotfire, Exensio), JMP, Galaxy Examinator, VB, etc. Strong working knowledge of Product / Package Qualification Process. Hands-on experience from HTOL / ESD / LU / HTS / TC / ELFR / UHAST / Endurance / Retention, etc. Experienced in ATE testing on V93K (PS1600 /PS9G/PSSL) ATE testers in CP/FT test. Hands-on experience from ATE test debug analysis with Test program , STDF, datalog, etc. Experienced in Bench testing of Electrical Characteristics, Tx/Rx Jitter, Eye Diagram for Memory Interface Products (RCD, DB, TS, SPD, etc) Familiar with Digital / Analog Product DFT / DFM method. JEDECT Spec and Product Datasheet. Deep knowledge of CMOS Process in HKMG / FINFET process. Ability to manage complex projects in parallel and on schedule . Preferred with Project Management experience. Solid organizational skills with attention to detail for risk management Good communication / reporting skills Self-motivated to work independently and in a team environment with project teams from different regions / timezones High energy, driven-to-succeed personality in fast pace environment Experience working with databases and creating regular reports Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world-leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21, 000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.

[ Location: NOIDA] Exp: 06-15Y We are seeking a highly skilled experienced PDN PV expert to join our Flows Methodologies Team. This role requires strong analytical skills, attention to detail, and the ability to work collaboratively with cross-functional teams. Proficiency in relevant EDA tools and a solid understanding of digital design principles are essential for success in these positions Scope of Responsibilities: As part of the Design Enablement team of the organization, you need to work closely with SoC cross functional teams to develop and define PDN PV flow methodology to meet SoC IP level objectives on low geometry nodes (3/5/16nm) Your scope of work will cover tools and flows definition, requirement management for SoC designs You will work with EDA Vendors to proactively review latest tools and flows offerings in PDN PV domains. Evaluate latest offerings and benchmark with organization used tools, flows, and methodologies. You will be an actor of change for deploying new tools methodologies across the organization Qualifications Bachelor or Master or Ph. D. in Electronics Engineering and specialization in VLSI domain 6-10, 10-15 years of hands-on experience in PDN (IR Drop EM analysis) PV (Physical Verification) domains Experience on PDN PV Signoff on lower tech-nodes Ability to debug PV issues (LVS, DRC, ERC, ANTENNA, ESDLUP etc) IR-EM-Power issues independently Ability to drive PDN PV methodology automation Strong scripting skills for Automation and Flow development using PERL/TCL/Python. Can - do attitude, openness to new environment, people and culture Strong communication skills (written and verbal), problem solving, attention to detail, commitment to task, and quality focus Ability to work independently and as part of a team Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world-leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21, 000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.

Analog Field Applications engineer to work with an array of customers across end equipment ranging from Industrial, Video, Communications, Lighting, Medical and Industrial segments and work with them solving complex problems on a daily basis. FAE role is expected to have the perfect blend of engineering knowledge coupled with the ability to successfully influence people for their business objectives. 6-10 Years of experience in technical engineering field. Should have basic Hardware design skills especially on Power Analog Product designs. Working as a Field Application Engineer, Analog Product knowledge is an added advantage - should be able to meet customers and address to resolve the technical issues. Design Engineers is good, should have willing to travel to customer places. Solve customer technical challenges from system prospective. Build up customer relationship and maximize Renesas product contents in customer s applications. Work together with sales force and product line in driving revenue growth. Execute the business targets from time to time. Identify product gap in the marketplace and provide new product opportunity to business unit. Qualifications Qualifications / Specific Knowledge / Skills: BE in Electrical/ Electronics Engineering /Computer Science/Computer Engineering or MSc in Electrical/Computer Science/Computer Engineering from a reputed University is good to have. Minimum of 3 years work experience in semiconductor technical sales or field applications engineering. Familiarity with timing, Video, Sensor Products topologies is added advantage. Knowledge of PCB design for noise protection. Strong problem-solving skills, self-motivated, and self-driven. Willing to learn new processes and tools. Willingness to travel to customer locations to promote demand creation essential. Must have passport and ability to travel internationally to receive technical training from our international business units. Must have own transportation to facilitate local conveyance. Ability to maintain technical expertise/competence with the ever-changing technology. Strong oral and written communication skills. Well organized and good at time management. Enthusiastic, creative with a desire to learn about business and technical topics. Ability to multi-task and work in a fast-paced environment. Team player, and willing to help where needed within scope of the role. Attractive compensation package offered. Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21, 000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.

Senior Staff Engineer - CI/CD System Development: Looking for an experienced CI/CD Experienced Team Manager or CI/CD System Architect Design Engineer to join the 2B$ R-Car Gen5 SW Project for Global OEM/Tier1 automotive manufacturers where in the candidate will get to work on a wide range of exciting R-Car SW products developed on Renesas R-Car CI/CD Environment based on Cloud/On-premises server systems. This is a growth opportunity where in the candidate will get to define CI/CD requirements with stakeholders, lead CI/CD experts in JP/VN/EU, and to co-develop CI/CD system with OEM/Tier1/Suppliers to build, test, package and deliver our SW products with ensuring SW Quality by Agile Scrum Practice. Essential Functions: Deploy CI/CD system to HPC Software Solution Division (HSSD) in Japan, Vietnam, India and Germany Plan to develop the feature development and maintenance of our CI/CD pipeline Work with Program/Project managers, software developers testers to prioritize requirements analysis in a fast-paced, rapidly changing environment Identify sources of manual work related to onboarding new projects from inception to CI/CD pipeline and strive to automate as much as possible Reduce the time it takes to build, deploy, and configure software to all environments Joint owner of SW build and release tools and processes. Qualifications Qualifications Minimum Requirements: MSc/BSc degree in Computer Science, Information Engineering, Electronic Engineering, or equivalent practical experience Leadership (or Project Management/Team management) skills and 5+ years IT/software project management experience and proven track record of achieving objectives on time 2+ years DevOps/Software Engineering experience with evidence of exceptional ability (Agile Scrum practice, coding skills like Python). 2+ years of experience with continuous integration tools like GitLab (Build CMake/YML files, Set up CI runner and the site management), JIRA, Docker, Artifactory, and/or other tools (e. g. Jenkins).

: We are looking for a highly skilled and experienced Physical Design Lead to join our VLSI team. The ideal candidate will have a strong background in physical design and a deep understanding of the VLSI design flow. This role involves leading a team of engineers and working closely with cross-functional teams to ensure the successful implementation and optimization of physical designs. Key Responsibilities: Lead the physical design team in the implementation of complex digital designs, including floorplanning, placement, clock tree synthesis, routing, and timing closure. Collaborate with RTL design, verification, and DFT teams to ensure design quality and robustness. Develop and implement physical design methodologies and best practices to improve design efficiency and quality. Perform static timing analysis, power analysis, and signal integrity analysis to ensure design performance and reliability. Interface with foundry and EDA tool vendors to resolve design issues and improve design flow. Mentor and coach junior engineers, providing technical guidance and support. Participate in design reviews and provide feedback to improve design quality and efficiency. Qualifications Qualifications: Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or a related field. Ability to understand design specifications, can contribute to design planning, partitioning, and setup a feasible seed for convergence PD cycle. Extensive experience in physical design, including floorplanning, placement, clock tree synthesis, routing, and timing closure. Good understanding of EDA tools such as Fusion Compiler, Innovus, Primetime, Tempus, VCLP, LEC, Calibre, Red Hawk. Strong understanding of static timing analysis, power analysis, and signal integrity analysis. Excellent problem-solving skills and attention to detail. Ability to work effectively in a team environment and communicate clearly with cross-functional teams. Experience in mentoring and coaching junior engineers is a plus. Company Description About Renesas: Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world-leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21, 000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.

This position requires an experienced technical lead familiar with validation processes through multiple product iterations and ideally, prior management experience. In particular, experience with DDR5 buffer chip products for high-speed analog characterization and knowledge of memory interfaces for server and enterprise applications is preferred. This candidate will need to be comfortable with dual roles of serving as a bench characterization lead and manage a small team of supporting engineers locally. Essential Duties and Responsibilities: Component Bench Characterization: Leverage best known test procedures including de-embedding, high-impedance probing, and noise compensation to resolve complex measurement challenges as data rates continue to scale. Support Design/Validation teams to characterize key parameters of high-speed memory devices. Work collaboratively with Designers to debug and optimize performance with open-ended tests that are not only driven by specifications. Validation Infrastructure Development: Develop new test infrastructure to support effective characterization and validation of high-speed memory interfaces. Maintain relationships with contacts for key equipment vendors and participate and lead in pathfinding/roadmap initiatives. Identify cycle time and cost improvements, including automations, to improve validation efficiency. Data Analysis and Reporting: Ability to synthesize results and identify next set of relevant experiments to understand issue. Generate consistent, well-written, and easily understandable reports in different formats as relevant to the audience. Develop and prove creative uses of LLM/AI techniques to analyze large validation data sets and generate effective visualizations and improve cycle time to final reports. Technical Communication: Effectively document test methodology and procedures to ensure reproducible and accurate results. Explain complex topics in appropriate level of detail to each relevant stakeholder. Work effectively with fellow Validation Engineers in diverse regions across language and technical knowledge differences. Team Management: Demonstrate ability to support/assist/mentor direct reports while also nurturing a culture of accountability and independence. Support development of direct reports to grow capabilities and advance in their career trajectory. Qualifications Required Qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, or a related field. 10+ years of hands-on experience in characterizing high-speed interfaces, particularly memory-related applications. Strong understanding of memory interface architecture and operation, preferably DDR5. In-depth knowledge of memory interface protocols and standards (e. g. , JEDEC specifications). Expertise in using typical high speed interface test equipment (BERT, Scope, Compliance S/W). Proficiency in scripting languages (e. g. , Python, Perl) for test automation and analysis. Excellent analytical and problem-solving skills. Strong communication and interpersonal skills. Preferred Qualifications: Masters degree in Electrical Engineering or a related field. Experience with advanced signal integrity measurements and applications for Design correlation. Experience with modern software tools for data visualization, analysis, and reporting; in particular dynamic interactive tools - including LLMs Company Description Renesas is a global semiconductor company providing hardware and software solutions for a range of cutting-edge technologies including self-driving cars, robots, automated factory equipment, and smart home applications. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas is a global, multi-billion dollar, publicly traded company headquartered in Japan, and has subsidiaries in 20 countries worldwide. Renesas is a dynamic, multi-cultural technology company where employees learn, mentor, innovate and thrive. Renesas is extending our share in fast-growing data economy-related markets such as infrastructure and data center and strengthening our presence in the industrial/IOT and automotive segments. Our solutions drive products developed by major innovators around the world. Join us and build your future by being part of what s next in electronics.

Overview We are looking for an experienced architects for high performance SOCs MCUs Architecture organization. The role involves driving architecture specifications working closely with business, product marketing, system architects, IP architects and designers, software architects developers. Responsibilities The successful candidate will be expected to Lead the SOC Architecture that will define the SOC/MCU/SubSystem architecture and detailed technical specifications from product requirements provided by business and product marketing organizations. Drive SOC MCU Chip developments and silicon design teams in ensuring predictable; on-schedule; high quality; first-time-right executions working in close alignment with business/customer, product marketing, program management, manufacturing team, Software, FuSa, cyber security etc. Define-Own-Deliver the chip implementation that meet KPI product requirement, including the specification compliance - ensuring coverage from verification, validation, characterization and test. Review/refine the outcomes to make sure the product is compliant. Experience in leading advanced automotive high performance SOCs/vehicle computers/SDVs/MCUs highly desired. Experience in driving technology, architecture and IP roadmaps IP selection and make/buy decisions are a key factor for this role. Need to work with peers across the business to drive change throughout Renesas to have common methods that work across the whole organization in partnership and collaboration with stakeholders and influence the direction taken. Role will involve external stakeholder engagement such as: supplier management, technical conference participation, technical standards engagement/awareness. Involve training program definition and roll out, lessons learned proliferation and best practice sharing. Qualifications Can - do attitude, openness to new environment, people and culture. Background in Electrical/Electronic Engineering, Computer Engineering or Computer Science System and Architecture level background is a must. Experience on end-to-end product development cycles from concept to productization. Advance technology node understanding and tapeout experience is a must. At least 10+ years of experience in leading NPI product development, technology, and teams In depth knowledge of industry standard tools and methodology Strong communication skills (written and verbal), problem solving, teamwork, attention to detail, commitment to task, and quality focus. Passion for continuously improvement of processes, methods, tracking mechanisms, coverage, automation and quality. Presentation and negotiation skills with ability to positively influence. Strong drive ability to coordinate work across a cross functional, highly experienced global teams.

Technical Manager role requiring 15+ years of experience of Digital design in Analog Mixed signal ICs for developing Power Management ICs as part of 2. 6B$ Power Business Unit at Renesas. Primary responsibilities include leading team which will fully own defining the microarchitecture to developing all Digital components of power management ICs, starting from System requirements. Due to the complex nature of Chips and significant Analog as well as Digital contents, collaboration with cross-functional teams to ensure successful integration of Digital and Analog components in ICs, is a must. The candidate will work on a wide range of exciting and cutting edge PMICs, including Linear and Switching DC-DC converters powering the next generation of most sought-after phones and handheld devices. This is an early-stage growth opportunity where in the candidate will get to learn, build and over time contribute and influence the charter for Renesas s massive Power product portfolio. Essential Functions: Manage the Digital Design team in terms of costs, methods and staffing to support device/silicon design requirements and to meet design deadlines as set by the program schedule. Mentor direct reports, giving appropriate guidance and support, and reviewing technical and behavioural performance regularly Must have experience of defining Dig-Ana boundary and Digital design scope for Power Management ICs/Analog intensive ICs Must have experience of defining the micro-architectures and sub-blocks for the ICs to ensure optimized Digital design, RTL design and Gate level netlist etc. Must be aware of Power Sensitive digital design and doing Power estimation for the Digital I/Ps Must be able to handle Clock Domain Crossing across multiple clock domains seamlessly and in a glitch free manner. Should be able to lead/collaborate for Logic Synthesis, Formal verification, Power estimation and STA. Should have experience of OTP, MTP, Efuse read/writes, controller design and data bus handling, Register read/write, Trimming of Analog parts/functions, DFT architecture and integration. Should be able to create Sequences (including Power UP/Down) and State Machines and Transitions to/from any state to another based on the IC requirements. Should be an expert of one or more Power Chip Communication I/Ps and protocols e. g. I2C, PMBUS, SVI3, SVID etc. Should be able to implement and analyse filters feedback loops in Digital, conversant with Z-domain analysis. Must have done multiple silicon debugs, root cause analysis of issues, design to silicon correlation etc. Should understand commonly used control loop architectures (Constant Freq, Constant ON/OFF Time, Current mode etc) and pros/limitations of each. Must be able to bring in innovative ideas to improve designs to meet challenging specifications and achieve better system performance. Should be able to setup Digital design flows and methodologies including checklists, reviews to ensure quality designs and take them all the way to Silicon success. Qualifications Bachelor s or master s degree in electrical engineering 15+ years in Digital Design and experience of working on Mixed Signal ICs, especially PMICs. Solid understanding and design experience of complex AMS designs. Chip design, Verification, Silicon validation, debugs, Qual support and taking ICs to production. Must be a technical leader, people manager team player, mentor and should strive towards fostering a highly creative and productive working environment Collaboration with Senior leadership to develop team objectives in accordance with wider company strategy. Ability to work with Senior Management to develop and work to budget. Cross cultural awareness and sensitivity. Results-oriented and able to deliver on-time under tight schedule pressure. Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21, 000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.

Looking for a 10+ years experienced Engineer with in-depth understanding of Analog concepts, experience of from scratch design of complex Analog I/Ps sub-blocks, integrating I/Ps and sub systems and ownership, experienced of fully owning smaller ICs (Point of loads, Single Converters) and owning major I/Ps in large PMICs, to join the 2. 6B$ Power Business Unit. The candidate will get to work on a wide range of exciting products such as PMICs, Linear and Switching DC-DC converters powering the next generation of most sought-after phones and handheld devices. This is an early-stage growth opportunity where in the candidate will get to learn, build and over time contribute and influence the charter for Renesas s massive Power product portfolio. Essential Functions: Must be proficient in designing and owning complex I/Ps like +ve/-ve Charge Pumps, Source-Sink LDOs, Ultra-low power Oscillators (including Relaxation type), Temperature Sensor, Current Sense, SAR ADCs, House Keeping blocks, Protection (Thermal, Under-Voltage, Over-Voltage, Over Current etc) and analog blocks including Bandgap references, V2I, Analog Buffers, Op-Amps, Comparators, High speed level shifters etc. Thorough understanding of Switch Cap circuits will be advantageous. Must have in-depth Understanding of and should be able to Implement Compensate the Control Loops, Analog feedback loops and should know trade-offs between various compensation strategies. Should be able to build/support Block level spec break down from Top level chip requirements and independently own, design complete switching converter e. g. Buck, Boost, Buck-Boost etc and LDOs. Must be able to do block level error budgeting depending on the block requirements. Must be aware of relative differences of various control loop architectures (Constant Freq, Constant ON/OFF Time, Current mode etc) and decide/implement the best option to meet converter level performance specifications and other system requirements. Must be able to bring in innovative ideas to improve designs to meet challenging specifications. Should have in-depth knowledge of Analog layouts and be able to work closely with layout lead from floor planning till Chip Top completion and verification and do trade-offs based on desired performance Must be conversant with the standard design, extraction and simulation flows tools, speed, convergence, accuracy trade-offs and should be able to optimize setups based on Pre/Post (with/without) Parasitic using simulator options, debug and navigate through tool related challenges. Should be able to setup design flows and methodologies including checklists, reviews to ensure quality designs and take them all the way to Silicon success. Should be able to mentor Freshers and Junior engineers for upscaling their technical skills as well as other skills needed for better efficacy. Should have experience of end-to-end IC development flow, Silicon debugs, and taking ICs to production Should be able to lead a small group of Engineers and navigate through all stages of IC development while handling and mitigating challenges, ensuring high quality silicon while adhering to the schedules based on business needs. Should have in-depth understanding of ESD, LU and other IC level issues and be able to define protection for the I/O ring for the IC Qualifications Bachelor s or master s degree in electrical engineering 10+ years in Analog Circuit Design, Simulation and Verification Solid understanding and design experience of complex analog designs with full ownership. Chip design, Verification, Silicon validation, debugs, Qual support and taking ICs to production. Must be a natural team player, mentor and strive towards fostering a highly creative and productive working environment Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21, 000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.

Collaborate with system architects and micro-architects to define high-level, implementable SoC specifications. Own end-to-end SOC RTL delivery while analysing and optimizing design for power, performance, and area (PPA) targets. Influence SoC definition, features, and adopt physical design friendly partitioning. Lead RTL design and integration of multi-subsystem SoCs , supporting complex architectures with multi-core, multi-power, and multi-reset domains . Demonstrate strong proficiency with front-end flows , including Lint, CDC, low-power (UPF) checks, synthesis, DFT , and Static Timing Analysis (STA) . Drive the development of robust Safety, Security, and Debug architectures for advanced SoCs with multiple interconnects. Design and integrate standard interface protocols such as AHB, AXI, CHI , and memory interfaces including ROM, RAM, Flash, LPDDR/DDR3/4 . Engage cross-functionally with DFT, physical design, verification, emulation, and validation teams to ensure first-time-right silicon and on-time project delivery. Support post-silicon debug, bring-up, and validation , working closely with lab and silicon validation teams. Continuously evaluate and adopt new design methodologies and best practices to improve productivity and shift-left the design cycle. Mentor junior engineers, review their work, and provide technical leadership and guidance across multiple design projects. Provide overall leadership and tracking of the team s goals. Contribute to the innovation quotient of the team via Desing Patents, Industry Standard Publications, AI-enabled design methodologies etc. Qualifications M. Tech/ B. Tech in Electrical Engineering or Computer Science with 12+ years of RTL design experience. Proven expertise in Verilog/SystemVerilog RTL design, integration, and microarchitecture. Strong understanding of SoC architecture, AMBA protocols (AXI, AHB, APB), clock/power domains, and memory subsystems. Experience with EDA tools for synthesis, lint, CDC, RDC, and timing analysis. Familiarity with UPF/low-power design, formal verification techniques, and static/dynamic checks. Excellent leadership, communication, and project management skills. Experience working with global cross-functional teams. Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21, 000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.

About Marvell . Your Team, Your Impact The Lab Endpoint Security Engineer will be responsible for designing, implementing, and maintaining security solutions to protect the confidentiality, integrity, and availability of our semiconductor lab environments. This role requires developing and implementing security policies, conducting vulnerability and risk assessments, and deploying risk reducing solutions to our labs. The ideal candidate has a strong understanding of lab workflows, embedded systems, and security practices tailored for high-value intellectual property (IP) environments. What You Can Expect Design and implement physical and logical access control systems in engineering labs Harden lab endpoints, test stations, and development tools against unauthorized access or tampering Ensure secure remote access and segmentation of lab environments from corporate IT Collaborate with IT, facilities, and engineering teams to align security with operational needs Define, deploy, and monitor lab-specific security policies (e. g. , USB restrictions, debug interface controls) Conduct risk assessments and remediation for lab infrastructure, equipment, and data flows Support monitor of lab networks for abnormal activity and enforce security event response workflows Assist in compliance audits and secure handling of sensitive data (e. g. , chip design files, firmware) Collaborate with the vulnerability management team to implement workflows for lab assets, including scanning, triage, patch coordination, and remediation tracking Collaborate with engineering to assess the impact of vulnerabilities on proprietary development tools or lab-built systems Fine tuning, configuration, administration, and management of the endpoint security platforms/solutions. Work with IT endpoint teams to manage Add/remove/Changes and troubleshoot issues related to endpoint security tools What Were Looking For Minimum 5+ years in security engineering, preferably in semiconductor, RD, or high-tech manufacturing environments. 3+ years proven experience with managing endpoint protection platforms Familiarity with lab tools, embedded development, and secure firmware practices Experience with vulnerability scanning tools and secure lab configuration management Working knowledge of regulatory frameworks (e. g. , ISO 27001, NIST 800-171) Experience securing remote access using VPN, ZTNA, or jump-host architectures Understanding of secure boot, code signing, and firmware integrity validation for embedded devices Ability to analyze endpoint telemetry from EDR solutions (e. g. , CrowdStrike, SentinelOne) in lab environments Experience managing vulnerability lifecycle processes and risk-based remediation planning for lab endpoints and test systems Experience in scripting languages such as Python, PowerShell, Bash, Perl, Jscript, and knowledge of regular expressions. Experience with administrating a diverse set of physical and virtual platforms, including MS Windows, Linux, and macOS. Ability to maintain, test, and troubleshoot endpoint protection policies and rules. Strong analytical and problem-solving abilities, with attention to detail. Ability to prioritize, drive others to action, deliver results, mentor and develop technical skills in team. Excellent communication and collaboration skills, with the ability to work effectively in a team environment. Ability to work independently and prioritize tasks in a fast-paced, dynamic environment. Bachelors degree in Computer Science, Information Technology, Cybersecurity, or related field or equivalent experience Relevant cybersecurity certifications such as CISSP, GIAC, or equivalent Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #LI-RS1

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Title: Lead Product Engineer Location: Bangalore Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadence s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees. The unique One Cadence - One Team culture promotes collaboration within and across teams to ensure customer success Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other every day. Job Summary: Drives development of products and technologies and has material responsibility for the success of that product/technology. VIP PE is expected to be an expert in Memory domain of Verification IP family- protocol and product-wise. PE main role is to help accelerate VIP portfolio adoption at Cadence s top tier customers by supporting pre-sales technical activities. To ensure that, one must have strong verification expertise and understand customer design and verification flows. As a Memory model VIP and protocol expert, PE drives product knowledge transfer across our field engineers and customer, providing training and developing collaterals. The PE will also need to translate high-level requirements from customers into a technical spec and drive the product definition that fits the customer needs. PE is expected to work independently and collaborate with other team members (RD, Marketing, support) to ensure all dimensions of the product are aligned. This role requires approximately 20% travel on average. Job responsibilities: (edit as per the requirement) Leads projects with high resource, risk and/or complexity Develops and leads large and multiple cross-functional and cross-organizational programs, initiatives, and activities with high resource requirements, risk and/or complexity Continually evaluates technology effectiveness/data interoperability of complex systems Manages issue resolution with vendors on tech/product quality and functionality and influences vendor roadmap and direction of products Communicates highly-complex ideas, anticipates potential objections and persuades others, often at senior levels, to adopt a different point of view. Experience and Technical Skills required (edit as per the requirement): At least 4+ to 8 years of experience with Verification and Design Working knowledge with Memory Models like DDR, HBM, LPDDR protocols is a must Experience with Developing Verification environments using System Verilog Working knowledge and experience with the UVM methodology Good experience on solving complex problems where analysis of situations or data requires an in-depth evaluation of various factors. Exercises judgment within broadly defined practices and policies in selecting methods, techniques, and evaluation criteria for obtaining results. Excellent problem-solving and debugging skills Qualifications BE/BTech/ME/MS/MTech in Electrical, Electronics Comm or Computer Science Engineering Behavioral skills required Must possess strong written, verbal and presentation skills Ability to establish a close working relationship with both customer peers and management Explore what s possible to get the job done, including creative use of unconventional solutions Work effectively across functions and geographies Push to raise the bar while always operating with integrity We re doing work that matters. Help us solve what others can t.