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ASIC RTL Design Engineer

ASIC RTL Design Engineer

AideWiser SolTek

5 - 8 years

|

0 Lacs

hyderabad telangana india

Posted:6 days ago| Platform: Foundit logo

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Skills Required

synthesis asic flow rtl coding system-verilog rtl design

Work Mode

On-site

Job Type

Full Time

Job Description

ASIC RTL Design Engineer

Exp: 5 to 8 yrs

Location: Hyderabad

Good knowledge on the digital concepts and ASIC flow
Experience in RTL coding is a must.
Must have hands on experience with SoC design and integration.
Experience in Verilog/System-Verilog is a must.
knowledge of AMBA protocols - AXI, AHB, APB
Basic knowledge on verification
Understanding of Memory controller designs and microprocessors is an added advantage
Experience in Synthesis / Understanding of timing concepts is a plus.
Excellent oral and written communications skills
Proactive, creative, curious, motivated to learn and contribute with good collaboration skills.

Mandatory Skills

Verilog,Synthesis (Inactive),Design,ASIC Flow,Static Timing Analysis (STA),RTL Design,RTL Coding

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