5 Asic Flow Jobs

The Senior CAD Engineer position based in Bangalore is seeking an experienced individual to take on the responsibility of deploying and supporting front-end tools, developing automation scripts, and collaborating with various teams for a seamless workflow. In this role, you will be tasked with deploying and supporting front-end tools including RTL simulators, low power tools, static RTL checkers, and formal verification tools. A key aspect of the role involves developing scripts to automate regression and debug flows, facilitating Continuous Integration/Continuous Delivery (CI/CD), and optimizing compute infrastructure utilization. Your responsibilities will also include identifying and addressing the needs of internal users, integrating tools and repositories efficiently, configuring project progress dashboards, and liaising with EDA vendors for license and tool installations. Moreover, you will be required to deploy tools and methodologies across different geographical locations to support global teams. To be considered for this role, you should possess a B.Tech/B.E in Computer Engineering or a related discipline, along with at least 10 years of relevant experience in CAD or allied fields. Additionally, you should have a minimum of 4 years of experience in a CAD role for large Silicon ASIC projects and a strong understanding of ASIC flow. Proficiency in scripting languages such as Python, bash, c, Makefiles, as well as Linux system administration skills, distributed version control systems like Git and/or Mercurial, are essential requirements for this position. While not mandatory, experience with Kubernetes or LSF Systems, HW Design Flows, System Verilog, Verilog, EDA/CAD, and familiarity with Javascript, CSS, and Web development frameworks would be considered advantageous for this role. If you are a proactive individual with a passion for CAD engineering and a desire to work in a dynamic and collaborative environment, we encourage you to apply and be a part of our innovative team.,

Eximietas Design is a leading technology consulting and solutions development firm specializing in the VLSI, Cloud Computing, Cyber Security, and AI/ML domains. We are currently looking to hire Senior ASIC SOC RTL Design Leads with a minimum of 10 years of experience in the field. The preferred locations for this position are Visakhapatnam or Bangalore. The ideal candidate should possess a Bachelor's degree in Computer Science or Electrical/Electronics with a strong background in ASIC SOC RTL (Micro-architecture). Knowledge and experience in ARM Processor Integration, particularly M55, is highly desirable. In addition, the candidate should have a solid understanding of design concepts, ASIC flow, SDC, STA reports, CDC logic, and lint rules. Familiarity with AMBA buses and common processor architectures like ARM and RiscV is also required. Experience in FPGA design, including part selection, pin assignment, timing constraints, synthesis, and debugging, is a plus. Proficiency in relevant tools such as Socrates, Core Consultant, xcellium, vcs, and JTAG debugging tools like Coresight and Lauterbach is preferred. Knowledge of low power design techniques and UPF is an advantage. As an RTL Engineer, the candidate will be responsible for working on IP, Subsystem, or SoC-related tasks. Key responsibilities include collaborating with architects, pre- and post-silicon verification teams to meet project deadlines, and coordinating with customer leads to ensure timely deliverables. If you meet the above requirements and are interested in this opportunity, please share your updated resume with us at maruthiprasad.e@eximietas.design.,

Conceptualizing, designing, and productizing state-of-the-art circuit components for SLM monitors realized through ASIC design flow. Designing on-chip Process, Voltage, Temperature, glitch, and Droop monitors for monitoring silicon biometrics. Developing statistical simulation methodologies and collaborating with the layout team to achieve optimal design solutions. Characterizing designed custom cells and deploying new circuits into test chips for post-silicon characterization. Creating new cells and updating existing ones through collaboration with architects and Physical Design engineers. Conducting pre and post-layout simulations and characterizations across various design corners to ensure reliability and aging requirements. The Impact You Will Have: Accelerating the integration of next-generation intelligent in-chip sensors and analytics into technology products. Optimizing performance, power, area, schedule, and yield of semiconductor lifecycle stages. Enhancing the reliability and differentiation of products in the market with reduced risk. Driving innovation in custom circuit design methodologies and tools. Contributing to the development of industry-leading SLM monitors and silicon biometrics solutions. Collaborating with cross-functional teams to ensure the successful deployment of advanced technologies. What You'll Need: BS or MS degree in Electrical Engineering with 5+ years of relevant industry experience. Strong custom design experience, including specification, circuit design description, and schematics. Proficiency with circuit design and simulation tools, IC design CAD packages from any EDA vendor. Sound understanding of SPICE simulator concepts and simulation methods. Experience with statistical design methodologies like generating and analyzing Monte-Carlo results.

Full-Time Role Overview We are looking for a Senior CAD Engineer to deploy and support our front end tools, to develop scripts to automate regression and debug flows, to work along with our design, implementation and verification teams. What you'll do Deploy and support front-end tools, such as, RTL simulators, low power tools, static RTL checkers such as Lint, CDC/RDC/SDC/DFT, and formal verification. Develop scripts to automate regression and debug flows, and to enable Continuous Integration/Continuous Delivery (CI/CD) Streamline utilization of compute infrastructure using load distribution tools Identify and prioritize needs of internal users and develop capabilities for them Proficiently use scripts to integrate tools, repos and compute infrastructure Configure and maintain project progress Dashboards. Interface with EDA vendors for license and tool installations Deploy tools and methodologies across geographies for global teams working together What you need to have B.Tech/B.E in Computer Engineering (or allied discipline e.g. Electrical, Electronics) 10+ years of relevant experience in CAD or allied disciplines 4+ years in a CAD role for a several 100 million gate Silicon ASIC project Knowledge and understanding of ASIC flow Proficiency in python, bash, c, Makefiles Proficiency in administration of Linux systems (such as Redhat Enterprise) Proficiency in distributed version control such as Git and/or Mercurial (Hg) Eager to learn, fast pick up and timely execution Experience in working with the standard CAD tools that are prevalent in the industry Nice-to-haves Experience with Kubernetes or LSF Systems Experience with HW Design Flows, System Verilog, Verilog, EDA/CAD, and Flows Experience with Javascript, CSS, and Web development frameworks

We are seeking a Senior CAD Engineer with 10+ years of experience to join our team in Bangalore The ideal candidate will be responsible for deploying and supporting front-end tools such as RTL simulators, low power tools, and static RTL checkers They will also develop scripts to automate regression/debug flows, manage CI/CD processes, interface with EDA vendors, and support global teams across geographies Proficiency in scripting (Python, Bash, Makefiles), Linux system administration, and version control tools (Git, Mercurial) is essential Experience in ASIC flows and standard CAD tools is required Immediate joiners with a notice period of 15 days or less are preferred