Analog Design, Sr Staff Engineer

Synopsys

0 - 4 years

25 - 30 Lacs

noida

Posted:2 weeks ago| Platform:

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Skills Required

semiconductor simulation design review chip design analytical analog mixed signal physical verification healthcare analog circuit design

Work Mode

Work from Office

Job Type

Full Time

Job Description

Designing and developing best-in-class ESD and Latch-Up robust solutions for advanced interface IPs using cutting-edge FinFet, FDSOI, and BCD processes.

Owning the full lifecycle of ESD structures from schematic design, simulation, and layout to silicon qualification and production release.
Leading and executing I/O development, including I/O ring design, review, and optimization for performance and robustness.
Developing and qualifying Interface Testchips, ensuring comprehensive ESD and Latch-Up validation to meet global customer requirements.
Running ESD simulations by building detailed ESD networks and performing advanced analyses to ensure design integrity.
Applying foundry-provided PERC (Physical Verification Rule Check) rules and using PERC check tools to validate compliance and enhance design quality.
Collaborating closely with foundry partners, design, and layout teams to ensure timely and effective integration of ESD and LU solutions.

The Impact You Will Have:

Elevating the reliability and performance of Synopsys interface IPs, directly influencing the success of global semiconductor customers.
Driving innovation in analog circuit design for next-generation silicon technologies, helping Synopsys maintain its leadership in the industry.
Reducing field failures and increasing product longevity by delivering robust ESD and Latch-Up protection solutions.
Accelerating time-to-market for customer products through efficient and high-quality design practices.
Fostering a culture of technical excellence and continuous improvement within the analog design team.
Building strong partnerships with foundries and cross-functional teams, enhancing collaboration and knowledge sharing across projects.

What You ll Need:

Proven experience in analog circuit design, with a focus on I/O development and ESD/LU robustness.
Hands-on expertise with FinFet, FDSOI, and BCD process technologies from leading foundries.
Strong background in ESD and Latch-Up qualification methodologies, including testchip development and validation.
Proficiency in ESD simulation, ESD network construction, and use of industry-standard tools.
Comprehensive understanding of PERC rules and practical experience with PERC verification tools.
Experience working with cross-functional teams including foundry, design, and layout groups

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