22 Synopsys Vcs Jobs

RTL Design Engineer Job Location: Bengaluru (BLR) and Hyderabad (HYD) Experience: 7 to 20 years About The Role : We are seeking a highly skilled and experienced RTL Design Engineer with a strong knowledge of ARM Micro Architecture to join our team. In this role, you will play a key role in the development of complex digital designs and contribute to the success of our cutting-edge projects. The ideal candidate will have a proven track record in RTL design and a deep understanding of ARM Micro Architecture. Key Responsibilities: Collaborate with cross-functional teams to define and develop RTL designs for advanced microprocessor-based projects. Design, implement, and verify digital logic bloc...

Lead Verification Engineer-Low Power We are seeking a highly skilled and experienced Lead Verification Engineer with expertise in USB/LPDDR and a strong knowledge of Cadence VIP. The ideal candidate will have a deep understanding of low-power design and verification techniques. Responsibilities: Develop and execute comprehensive verification strategies for USB/LPDDR subsystem designs, considering low-power design requirements. Collaborate with cross-functional teams to define verification goals and ensure alignment with project objectives. Design and implement reusable, scalable, and efficient verification testbenches using SystemVerilog/UVM or C based . Leverage Cadence VIP and other verifi...

Role & responsibilities Define verification strategies and develop verification plans for complex SoC components and subsystems. Lead the creation of testbenches and verification environments using SystemVerilog and UVM. Drive functional, assertion-based, and coverage-driven verification methodologies. Collaborate with RTL, architecture, and firmware teams to identify corner cases and critical design scenarios. Debug and root-cause functional issues using simulation tools and waveform analysis. Review and optimize test plan coverage metrics and drive coverage closure. Automate and manage regression suites and analyze simulation results. Guide junior engineers and perform code reviews. Coordi...

As an ASIC Verification Engineer at AMD, your role is crucial in driving strategies and successful verification execution on Block level and System level verification of high-performance IPs and/or SOC designs. Your responsibilities include: - Demonstrating a proven track record in technically leading a team and collaborating with cross-functional teams - Planning inter-locks with dependent teams and preempting risks with mitigation plans - Developing UVM/OVM and/or Verilog, System Verilog test benches - Utilizing simulation tools/debug environments like Synopsys VCS, Cadence IES for verifying high-performance IPs and/or SOC designs - Implementing state-of-the-art verification techniques, in...

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiencesfrom AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challengesstriving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Toge...

Job Overview: We are seeking a highly skilled and motivated Design Verification Lead to join our advanced VLSI design team. The ideal candidate will have strong expertise in SystemVerilog, UVM (Universal Verification Methodology), and verification of industry-standard protocols (e.g., PCIe, USB, Ethernet, DDR, etc.). As the Design Verification Lead, you will lead the verification of complex SoC and IP designs, mentor verification engineers, and collaborate closely with design, architecture, and validation teams to deliver high-quality, robust products. Key Responsibilities: Lead the design verification efforts for complex SoC/IP projects following best practices. Develop and maintain verific...

As a Senior Member of Technical Staff (SMTS) Silicon Design Engineer at AMD, you will be an integral part of the Circuit Technology team, focusing on DFT Methodology/Architect/RTL execution for high-speed SERDES Phys, Next-gen Memory Phys, and Die-to-Die interconnect IPs. Your responsibilities will include defining the DFX architecture for high-speed PHYs and die-to-die connectivity IP designs, RTL coding, supporting scan stitching, developing timing constraints, assisting with ATPG, and post-silicon bringup. Join a dynamic team that delivers cutting-edge IPs crucial for every SOC developed by AMD. Key Responsibilities: - Lead and define Design for Test/Debug/Yield Features specific to PHYs....

As a Design and Verification Trainer, you will be responsible for providing guidance and support to budding engineers in the areas of RTL design, functional verification, and VLSI concepts. Your practical experience in front-end design and verification methodologies will be crucial in effectively conveying technical knowledge in an organized, engaging, and articulate manner. Key Responsibilities: - Utilize your strong command over hardware description languages such as Verilog and SystemVerilog - Demonstrate a deep understanding of verification methodologies including UVM and SystemVerilog Assertions - Proficiency in simulation and debugging tools like Synopsys VCS, VERDI, and Spyglass - Emp...

Role Overview: You will be joining AMD as an ASIC Verification Engineer. Your main responsibility will be to drive strategies and lead successful verification execution on Block level and System level verification of high-performance IPs and/or SOC designs. Key Responsibilities: - Lead a team and collaborate with cross-functional teams to plan inter-locks with dependent teams, pre-empt risks, and have mitigation plans in place. - Develop UVM/OVM and/or Verilog, System Verilog test benches and utilize simulation tools/debug environments like Synopsys VCS, Cadence IES for verifying high-performance IPs and/or SOC designs. - Implement state-of-the-art verification techniques including assertion...

Job Description Total experience (5 -7 years) with SOC GLS experience of minimum 3+ years Hands on experience in GLS (Zero Delay, SDF, PAGLS) Excellent debugging skills and fixing issues Knowledge in SV/UVM and test bench flow Good experience in EDA tools such as Synopsys Verdi, Cadence NC Sim. Understanding of SOC Architecture Education Qualification: Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or related field.

As a DFT Verification Engineer, your role involves developing and executing pre-silicon verification test plans for DFT features of the chip. This includes verifying DFT design blocks and subsystems using complex SV or C++ verification environments. You will also be responsible for building test bench components, composing tests, assertions, checkers, and validation vectors to ensure verification completeness. Additionally, debugging regression test failures and addressing areas of concern to meet design quality objectives are key responsibilities. Key Responsibilities: - Develop and execute pre-silicon verification test plans for DFT features of the chip - Verify DFT design blocks and subsy...

You have an exciting opportunity with Tessolve Semiconductor in Bangalore for the roles of RTL Design Engineer and Design Verification Engineer. For the position of RTL ASIC Engineer, you should have at least 7 years of work experience in ASIC/IP Design with expertise in Logic design and RTL design. Your responsibilities will involve IP design and integration, along with proficiency in tools such as Lint and CDC for ASIC development. Knowledge of Synthesis and understanding of timing concepts would be advantageous. Additionally, familiarity with AMBA protocols like AXI, AHB, APB, and SoC clocking/reset architecture is preferred. As a Design Verification Engineer, you are required to have 5 t...

Role : RTL Synthesis Engineer (Vivado Backend / RTL Synthesis ,Hyderabad) Work Location (Client): Hyderabad Work Mode or timing : Work From Office / Normal Working hours Qualification : MS or equivalent work experience in Electrical Engineering or similar technology area Experience Level : 4+ years Job Description : An experienced application engineer to focus on FPGA & ACAP Compilation flows, design closure ease-of-use, tools specification, validation, documentation, and key customers support Responsibilities Contribute to triaging reported issues in several Vivado product areas, such as design entry, synthesis, implementation, and help engineering address them effectively. Actively explore...

The ideal candidate for this role should hold a Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or a related field or possess equivalent practical experience. Additionally, you should have at least 5 years of experience working with ML/AI frameworks and libraries such as TensorFlow, PyTorch, and scikit-learn. It is essential to have a background in hardware description languages like Verilog, SystemVerilog, and VHDL, along with experience in applying ML/AI techniques. Preferred qualifications include hands-on experience with ML/AI applications in hardware design, verification, and Low Power, such as formal verification with ML and coverage closure with ML...

You are an AMS Verification engineer with a B.Tech/M.Tech degree and 5-11 years of industry experience in analog/mixed signal behavioral modeling. Your responsibilities include full chip verification at various levels using SV RNM or Custom UDNs. You should have a good understanding of analog design concepts and mixed signal design architectures, working with products integrating various Analog/Mixed-Signal building blocks. Your experience should cover verification plan development, UVM verification environment development/debug, and verification of complex mixed signal products at different levels. Familiarity with Analog/Mixed-Signal/RF design architectures, debug experience with schematic...

We HCL are seeking a highly motivated RTL Design Engineer with 7-12 years of experience to join our growing team. You will play a vital role in the design and development of complex digital logic for next-generation integrated circuits (ICs). This position offers the opportunity to work on challenging projects while utilizing your expertise in RTL design methodologies and verification. Responsibilities: Design and develop RTL code for digital logic blocks and modules using Verilog or VHDL Perform comprehensive functional verification using industry-standard methodologies (e.g., UVM) Conduct static timing analysis (STA) and participate in timing closure activities Integrate designed modules i...

You will be joining Eximietas as a Senior Design Verification Engineer/Lead in Bengaluru with 5-15 years of experience. Your primary responsibility will be to lead the SoC Design Verification efforts for complex projects, ensuring the successful execution of verification plans. This includes developing and implementing comprehensive verification strategies for high-speed and low-speed peripherals such as I2C, SPI, UART, GPIO, QSPI, as well as high-speed protocols like PCIe, Ethernet, CXL, MIPI, DDR, HBM. You will be conducting Gate-level simulations and power-aware verification using tools like Xprop and UPF. Collaboration with cross-functional teams, including architects, designers, and pre...

We are seeking a highly skilled and experienced Lead Verification Engineer with expertise in USB/LPDDR and a strong knowledge of Cadence VIP. The ideal candidate will have a deep understanding of low-power design and verification techniques. Responsibilities: Develop and execute comprehensive verification strategies for USB/LPDDR subsystem designs, considering low-power design requirements. Collaborate with cross-functional teams to define verification goals and ensure alignment with project objectives. Design and implement reusable, scalable, and efficient verification testbenches using SystemVerilog/UVM or C based . Leverage Cadence VIP and other verification IPs to accelerate the verifica...

Job Location: Bengaluru (BLR) and Hyderabad (HYD) Experience: 7 to 20 years : We are seeking a highly skilled and experienced RTL Design Engineer with a strong knowledge of ARM Micro Architecture to join our team. In this role, you will play a key role in the development of complex digital designs and contribute to the success of our cutting-edge projects. The ideal candidate will have a proven track record in RTL design and a deep understanding of ARM Micro Architecture. Key Responsibilities: Collaborate with cross-functional teams to define and develop RTL designs for advanced microprocessor-based projects. Design, implement, and verify digital logic blocks and modules in accordance with p...

We are seeking an experienced and dedicated Design and Verification Trainer to provide guidance and support to budding engineers in the areas of RTL design, functional verification, and VLSI concepts. As a Trainer, you will draw upon your practical experience in front-end design and verification methodologies to effectively convey technical knowledge in an organized, engaging, and articulate manner. Your role will require a strong command over hardware description languages such as Verilog and SystemVerilog, along with a deep understanding of verification methodologies including UVM and SystemVerilog Assertions. Proficiency in simulation and debugging tools like Synopsys VCS, VERDI, and Spyg...

SE NIOR SILICON DESIGN ENGINEER THE ROLE : We are looking for an adaptive, self-motivative design verification engineer to join our growing team. As a key contributor , you will be part of a leading team to drive and improve AMDs abilities to deliver the highest quality, industry-leading technologies to market. The V erification Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other ...

Job Details: : Performs functional verification of IP logic to ensure design will meet specification requirements. Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications. Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features. Docu...