32 Synopsys Vcs Jobs

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5.0 - 9.0 years

0 Lacs

karnataka

On-site

As a Senior Member of Technical Staff (SMTS) Silicon Design Engineer at AMD, you will play a crucial role in the Circuit Technology team, focusing on DFT Methodology/Architect/RTL execution for high-speed SERDES Phys, Next-gen Memory Phys, and Die-to-Die interconnect IPs. Your tasks will involve defining the DFX architecture for high-speed PHYs and die-to-die connectivity IP designs, RTL coding, supporting scan stitching, developing timing constraints, assisting with ATPG, and post-silicon bringup. Join a dynamic team at AMD that delivers cutting-edge IPs essential for every SOC. Key Responsibilities: - Lead and define Design for Test/Debug/Yield Features specific to PHYs. - Implement DFX fe...

Posted 2 weeks ago

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5.0 - 9.0 years

0 Lacs

mysore, karnataka

On-site

As a Design and Verification Trainer, you will be responsible for providing guidance and support to budding engineers in the areas of RTL design, functional verification, and VLSI concepts. You will utilize your practical experience in front-end design and verification methodologies to effectively convey technical knowledge in an organized, engaging, and articulate manner. Key Responsibilities: - Demonstrating a strong command over hardware description languages such as Verilog and SystemVerilog - Utilizing a deep understanding of verification methodologies including UVM and SystemVerilog Assertions - Proficiency in simulation and debugging tools like Synopsys VCS, VERDI, and Spyglass - Appl...

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5.0 - 7.0 years

0 Lacs

bengaluru, karnataka, india

On-site

Job Description: Designs, develops, validates, and/or debugs software abstractions and frameworks for acceleration with FPGAs to support embedded, data center, and communication clients. Key Responsibilities Collaborate with architects and design engineers to understand IP specifications and define comprehensive verification strategies and detailed test plans. Develop robust, reusable, and constrained-random verification environments using SystemVerilog and UVM (Universal Verification Methodology) . Create and implement directed and random test cases and test sequences to exercise design functionality and uncover potential bugs. Develop verification components, including drivers, monitors, s...

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0.0 years

0 Lacs

hyderabad, telangana, india

On-site

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. To...

Posted 3 weeks ago

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4.0 - 10.0 years

0 Lacs

bengaluru, karnataka, india

On-site

4 to 10 years experience in SoC/Subsystem Design Verification SystemVerilog and UVM Testbench creation experience is a must Own and drive Defining/Implementation of test plans Debugging complex issues Completion of coverage including gate-level simulations Experience in writing SVA (SystemVerilog Assertions) is a must Protocol Expertise (Deep knowledge and hands-on expertise) on one or more of the following PCIe, UCIe, CXL, or NVMe AXI, ACE or CHI Ethernet DDR, LPDDR or HBM Should have worked on verification of at least three full-chip/subsystem DV projects EDA tools Synopsys VCS/ Cadence Xcelium and Verdi debugger Experience of Power Aware Simulations using UPF is desirable (not a must) Exp...

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12.0 - 14.0 years

0 Lacs

hyderabad, telangana, india

On-site

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. To...

Posted 4 weeks ago

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5.0 - 9.0 years

0 Lacs

mysore, karnataka

On-site

As an experienced and dedicated Design and Verification Trainer, you will be responsible for providing guidance and support to budding engineers in the areas of RTL design, functional verification, and VLSI concepts. Drawing upon your practical experience in front-end design and verification methodologies, your role will involve conveying technical knowledge in an organized, engaging, and articulate manner. Key Responsibilities: - Command over hardware description languages such as Verilog and SystemVerilog - Deep understanding of verification methodologies including UVM and SystemVerilog Assertions - Proficiency in simulation and debugging tools like Synopsys VCS, VERDI, and Spyglass - Expe...

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15.0 - 19.0 years

0 Lacs

hyderabad, telangana

On-site

Role Overview: At AMD, you will be working as an ASIC Verification Engineer. Your role will involve driving strategies and successful verification execution on Block level and System level verification of high-performance IPs and/or SOC designs. You will be contributing to the mission of building great products that accelerate next-generation computing experiences, from AI and data centers to PCs, gaming, and embedded systems. Grounded in a culture of innovation and collaboration, you will be part of a team that believes in pushing the limits of innovation to solve the world's most important challenges. Key Responsibilities: - Technically lead a team and work with cross-functional teams, pla...

Posted 1 month ago

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3.0 - 7.0 years

0 Lacs

karnataka

On-site

As a Senior FPGA Engineer at izmo Microsystems Ltd., you will play a crucial role in architecting and implementing FPGA-based systems for high-performance digital logic applications. With a minimum of 3 to 6+ years of hands-on experience in FPGA development, you will be responsible for various key tasks and collaborate with cross-functional teams to ensure the success of next-generation electronic systems. Key Responsibilities: - Architect and implement FPGA-based systems using VHDL or Verilog to meet high-performance requirements. - Develop RTL code, simulation testbenches, and synthesis scripts while considering timing, power, and area constraints. - Integrate FPGA designs with embedded pr...

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10.0 - 12.0 years

0 Lacs

bengaluru, karnataka, india

On-site

Job Requirements Design Verification professional with a proven track record in leading DV projects for complex SoC/ASIC/FPGA designs. This role will be working closely with world class engineering teams to ensure design quality, performance, and verification closure on cutting-edge hardware products. Key Responsibilities Lead the DV team in planning, developing, and executing verification strategies for SoC/ASIC designs. Collaborate with architects, RTL designers, and validation engineers to define verification requirements and methodologies. Develop and maintain verification environments using UVM/SystemVerilog. Drive code reviews, functional coverage analysis, and regression tracking to a...

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7.0 - 12.0 years

4 - 8 Lacs

bengaluru

Work from Office

RTL Design Engineer Job Location: Bengaluru (BLR) and Hyderabad (HYD) Experience: 7 to 20 years About The Role : We are seeking a highly skilled and experienced RTL Design Engineer with a strong knowledge of ARM Micro Architecture to join our team. In this role, you will play a key role in the development of complex digital designs and contribute to the success of our cutting-edge projects. The ideal candidate will have a proven track record in RTL design and a deep understanding of ARM Micro Architecture. Key Responsibilities: Collaborate with cross-functional teams to define and develop RTL designs for advanced microprocessor-based projects. Design, implement, and verify digital logic bloc...

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8.0 - 13.0 years

7 - 11 Lacs

bengaluru

Work from Office

Lead Verification Engineer-Low Power We are seeking a highly skilled and experienced Lead Verification Engineer with expertise in USB/LPDDR and a strong knowledge of Cadence VIP. The ideal candidate will have a deep understanding of low-power design and verification techniques. Responsibilities: Develop and execute comprehensive verification strategies for USB/LPDDR subsystem designs, considering low-power design requirements. Collaborate with cross-functional teams to define verification goals and ensure alignment with project objectives. Design and implement reusable, scalable, and efficient verification testbenches using SystemVerilog/UVM or C based . Leverage Cadence VIP and other verifi...

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2.0 - 7.0 years

6 - 16 Lacs

bengaluru

Work from Office

Role & responsibilities Define verification strategies and develop verification plans for complex SoC components and subsystems. Lead the creation of testbenches and verification environments using SystemVerilog and UVM. Drive functional, assertion-based, and coverage-driven verification methodologies. Collaborate with RTL, architecture, and firmware teams to identify corner cases and critical design scenarios. Debug and root-cause functional issues using simulation tools and waveform analysis. Review and optimize test plan coverage metrics and drive coverage closure. Automate and manage regression suites and analyze simulation results. Guide junior engineers and perform code reviews. Coordi...

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15.0 - 19.0 years

0 Lacs

hyderabad, telangana

On-site

As an ASIC Verification Engineer at AMD, your role is crucial in driving strategies and successful verification execution on Block level and System level verification of high-performance IPs and/or SOC designs. Your responsibilities include: - Demonstrating a proven track record in technically leading a team and collaborating with cross-functional teams - Planning inter-locks with dependent teams and preempting risks with mitigation plans - Developing UVM/OVM and/or Verilog, System Verilog test benches - Utilizing simulation tools/debug environments like Synopsys VCS, Cadence IES for verifying high-performance IPs and/or SOC designs - Implementing state-of-the-art verification techniques, in...

Posted 1 month ago

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10.0 - 12.0 years

0 Lacs

bengaluru, karnataka, india

On-site

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiencesfrom AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challengesstriving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Toge...

Posted 2 months ago

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8.0 - 10.0 years

0 Lacs

ahmedabad, gujarat, india

On-site

Job Overview: We are seeking a highly skilled and motivated Design Verification Lead to join our advanced VLSI design team. The ideal candidate will have strong expertise in SystemVerilog, UVM (Universal Verification Methodology), and verification of industry-standard protocols (e.g., PCIe, USB, Ethernet, DDR, etc.). As the Design Verification Lead, you will lead the verification of complex SoC and IP designs, mentor verification engineers, and collaborate closely with design, architecture, and validation teams to deliver high-quality, robust products. Key Responsibilities: Lead the design verification efforts for complex SoC/IP projects following best practices. Develop and maintain verific...

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5.0 - 9.0 years

0 Lacs

karnataka

On-site

As a Senior Member of Technical Staff (SMTS) Silicon Design Engineer at AMD, you will be an integral part of the Circuit Technology team, focusing on DFT Methodology/Architect/RTL execution for high-speed SERDES Phys, Next-gen Memory Phys, and Die-to-Die interconnect IPs. Your responsibilities will include defining the DFX architecture for high-speed PHYs and die-to-die connectivity IP designs, RTL coding, supporting scan stitching, developing timing constraints, assisting with ATPG, and post-silicon bringup. Join a dynamic team that delivers cutting-edge IPs crucial for every SOC developed by AMD. Key Responsibilities: - Lead and define Design for Test/Debug/Yield Features specific to PHYs....

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3.0 - 7.0 years

0 Lacs

mysore, karnataka

On-site

As a Design and Verification Trainer, you will be responsible for providing guidance and support to budding engineers in the areas of RTL design, functional verification, and VLSI concepts. Your practical experience in front-end design and verification methodologies will be crucial in effectively conveying technical knowledge in an organized, engaging, and articulate manner. Key Responsibilities: - Utilize your strong command over hardware description languages such as Verilog and SystemVerilog - Demonstrate a deep understanding of verification methodologies including UVM and SystemVerilog Assertions - Proficiency in simulation and debugging tools like Synopsys VCS, VERDI, and Spyglass - Emp...

Posted 2 months ago

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15.0 - 19.0 years

0 Lacs

hyderabad, telangana

On-site

Role Overview: You will be joining AMD as an ASIC Verification Engineer. Your main responsibility will be to drive strategies and lead successful verification execution on Block level and System level verification of high-performance IPs and/or SOC designs. Key Responsibilities: - Lead a team and collaborate with cross-functional teams to plan inter-locks with dependent teams, pre-empt risks, and have mitigation plans in place. - Develop UVM/OVM and/or Verilog, System Verilog test benches and utilize simulation tools/debug environments like Synopsys VCS, Cadence IES for verifying high-performance IPs and/or SOC designs. - Implement state-of-the-art verification techniques including assertion...

Posted 3 months ago

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5.0 - 8.0 years

10 - 20 Lacs

bengaluru

Hybrid

Job Description Total experience (5 -7 years) with SOC GLS experience of minimum 3+ years Hands on experience in GLS (Zero Delay, SDF, PAGLS) Excellent debugging skills and fixing issues Knowledge in SV/UVM and test bench flow Good experience in EDA tools such as Synopsys Verdi, Cadence NC Sim. Understanding of SOC Architecture Education Qualification: Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or related field.

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3.0 - 10.0 years

0 Lacs

karnataka

On-site

As a DFT Verification Engineer, your role involves developing and executing pre-silicon verification test plans for DFT features of the chip. This includes verifying DFT design blocks and subsystems using complex SV or C++ verification environments. You will also be responsible for building test bench components, composing tests, assertions, checkers, and validation vectors to ensure verification completeness. Additionally, debugging regression test failures and addressing areas of concern to meet design quality objectives are key responsibilities. Key Responsibilities: - Develop and execute pre-silicon verification test plans for DFT features of the chip - Verify DFT design blocks and subsy...

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5.0 - 20.0 years

0 Lacs

karnataka

On-site

You have an exciting opportunity with Tessolve Semiconductor in Bangalore for the roles of RTL Design Engineer and Design Verification Engineer. For the position of RTL ASIC Engineer, you should have at least 7 years of work experience in ASIC/IP Design with expertise in Logic design and RTL design. Your responsibilities will involve IP design and integration, along with proficiency in tools such as Lint and CDC for ASIC development. Knowledge of Synthesis and understanding of timing concepts would be advantageous. Additionally, familiarity with AMBA protocols like AXI, AHB, APB, and SoC clocking/reset architecture is preferred. As a Design Verification Engineer, you are required to have 5 t...

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4.0 - 9.0 years

20 - 35 Lacs

hyderabad

Work from Office

Role : RTL Synthesis Engineer (Vivado Backend / RTL Synthesis ,Hyderabad) Work Location (Client): Hyderabad Work Mode or timing : Work From Office / Normal Working hours Qualification : MS or equivalent work experience in Electrical Engineering or similar technology area Experience Level : 4+ years Job Description : An experienced application engineer to focus on FPGA & ACAP Compilation flows, design closure ease-of-use, tools specification, validation, documentation, and key customers support Responsibilities Contribute to triaging reported issues in several Vivado product areas, such as design entry, synthesis, implementation, and help engineering address them effectively. Actively explore...

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5.0 - 9.0 years

0 Lacs

karnataka

On-site

The ideal candidate for this role should hold a Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or a related field or possess equivalent practical experience. Additionally, you should have at least 5 years of experience working with ML/AI frameworks and libraries such as TensorFlow, PyTorch, and scikit-learn. It is essential to have a background in hardware description languages like Verilog, SystemVerilog, and VHDL, along with experience in applying ML/AI techniques. Preferred qualifications include hands-on experience with ML/AI applications in hardware design, verification, and Low Power, such as formal verification with ML and coverage closure with ML...

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5.0 - 11.0 years

0 Lacs

karnataka

On-site

You are an AMS Verification engineer with a B.Tech/M.Tech degree and 5-11 years of industry experience in analog/mixed signal behavioral modeling. Your responsibilities include full chip verification at various levels using SV RNM or Custom UDNs. You should have a good understanding of analog design concepts and mixed signal design architectures, working with products integrating various Analog/Mixed-Signal building blocks. Your experience should cover verification plan development, UVM verification environment development/debug, and verification of complex mixed signal products at different levels. Familiarity with Analog/Mixed-Signal/RF design architectures, debug experience with schematic...

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