Sr Staff ASIC Verification Engineer

12 - 17 years

12 - 17 Lacs

Bengaluru / Bangalore, Karnataka, India

Posted:2 weeks ago| Platform: Foundit logo

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Skills Required

systemverilog Uvm protocol knowledge DDR AMBA test bench architecture coverage-driven verification scripting C

Work Mode

On-site

Job Type

Full Time

Job Description

What You ll Be Doing: Making architectural decisions on test bench design. Writing verification plans and specifications. Implementing test bench infrastructure and writing test cases. Implementing a coverage-driven methodology. Leading technical aspects of verification projects. Collaborating with international teams of architects, designers, and verification engineers. The Impact You Will Have: Enhancing the robustness and reliability of IP cores used in critical applications. Driving innovation in verification methodologies and tools. Ensuring high-quality deliverables through rigorous verification processes. Improving productivity, performance, and throughput of verification solutions. Contributing to the success of Synopsys customers in industries such as AI, automotive, and server farms. Mentoring and guiding junior engineers in the verification domain. What You ll Need: Knowledge of protocols such as DDR, PCIe, AMBA (AXI, CHI), SD/eMMC, Ethernet, USB, MIPI. Hands-on experience with UVM/VMM/OVM, test planning, and coverage closure. Proficiency in SystemVerilog and UVM, object-oriented coding, and verification. Experience with scripting languages like C/C++, TCL, Perl, Python. Experience with functional safety standards such as ISO26262 and FMEDA (preferred). Who You Are: Independent and precise in your work. Innovative and proactive in problem-solving. Excellent communicator and team player. Detail-oriented with a strong analytical mindset. Eager to learn and grow within a technical role

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Synopsys
Synopsys

Software Development

Sunnyvale California

10001 Employees

617 Jobs

    Key People

  • Aart de Geus

    Co-CEO and Chairman
  • Chi-Foon Chan

    Co-CEO and President

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