Silicon Micro-architecture and RTL Lead

In this role, you'll be part of a team working on shaping the future of AI/ML hardware acceleration, specifically focusing on cutting-edge TPU (Tensor Processing Unit) technology. Your main responsibilities will include: - Driving the development of Complex IPs and Subsystems in collaboration with a team of engineers in the Bengaluru design organization. - Taking ownership of the micro-architecture and implementation of IPs and subsystems. - Collaborating with Architecture, Firmware, and Software teams to ensure feature closure and develop micro-architecture specifications. - Leading design methodology, libraries, debug, and code review activities in coordination with other IPs Design Verification (DV) teams and physical design teams. - Identifying and implementing Power, Performance, and Area improvements for the domains under your ownership. Qualifications required for this role include: - Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. - 10 years of experience in ASIC development with Verilog/SystemVerilog, VHSIC Hardware Description Language (VHDL). - Experience in micro-architecture and designing IPs and Subsystems. - Expertise in ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT). Preferred qualifications for this role are: - Proficiency in scripting languages like Python or Perl. - Experience in SoC designs and integration flows. - Knowledge of bus architectures, fabrics/NoC, processor design, accelerators, or memory hierarchies. - Understanding of high-performance and low-power design techniques. About the company: The company is involved in developing ASICs used to accelerate and enhance traffic efficiency in data centers. The company collaborates with various teams such as architecture, verification, power and performance, physical design, etc., to deliver high-quality designs for next-generation data center accelerators. The company encourages innovative problem-solving approaches, evaluates design options with complexity, performance, power, and area considerations, and aims to drive advancements in the field of data center efficiency.,