17 Soc Designs Jobs

THE ROLE: AECG SSD ASIC is a centralized ASIC design group within AMD s Adaptive and Embedded Computing Organization. The group consists of design teams located in several AMD locations in North America and Asia. It is primarily responsible for architecture, design, and implementation of critical Design-for-Test (DFT) and Design-for-Debug (DFD) features for cutting edge AMD products. THE PERSON: As a DFx Silicon Design Engineer, you will be working with a team of design engineers from various global design locations on design-for-test (DFT) design and implementation, tool and methodology development, project execution and continuous improvement initiatives, this role provides an excellent gr...

As a candidate for the position, you will be part of a team that is dedicated to pushing boundaries and developing custom silicon solutions that will drive the future of Google's direct-to-consumer products. Your contributions will play a key role in innovating products that are loved by millions globally, shaping the next generation of hardware experiences with unparalleled performance, efficiency, and integration. The ML, Systems, & Cloud AI (MSCA) organization at Google is responsible for designing, implementing, and managing hardware, software, machine learning, and systems infrastructure for all Google services, including Google Cloud. Your work will impact Googlers, Cloud customers, an...

In this role, you will work on shaping the future of AI/ML hardware acceleration, focusing on cutting-edge TPU (Tensor Processing Unit) technology that powers Google's demanding AI/ML applications. You will be part of a team that develops custom silicon solutions for Google's TPUs, contributing to innovative products used by millions worldwide. Your expertise in design and verification will be crucial in verifying complex digital designs, with a specific emphasis on TPU architecture and its integration within AI/ML systems. As a member of the team, you will play a key role in developing ASICs that enhance traffic efficiency in data centers. Collaborating with various teams such as architectu...

In this role, you will work to shape the future of AI/ML hardware acceleration, specifically focusing on TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You will be part of a team that pushes boundaries and develops custom silicon solutions for Google's TPU, contributing to the innovation behind products loved by millions worldwide. Your expertise in design and verification will be utilized to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. Key Responsibilities: - Own microarchitecture, implementation, and integration of SoC Chassis and subsystems. - Perform quality chec...

As a member of the team, you will contribute to shaping the future of AI/ML hardware acceleration, focusing on cutting-edge TPU technology that drives Google's most demanding AI/ML applications. Your responsibilities will involve verifying complex digital designs, specifically related to TPU architecture and its integration within AI/ML-driven systems. You will work on ASICs used to enhance data center traffic, collaborating with various teams to deliver high-quality designs for next-generation data center accelerators. Innovation, problem-solving, and evaluation of design options will be key aspects of your role, with a focus on micro-architecture and logic solutions. Responsibilities: - Ow...

In a fast-paced leading-edge design environment with endless possibilities of innovation and learning, you will be responsible for ensuring flawless execution in specific areas of SoC level Physical Design such as Physical Verification, Tapeout, ESD Verification, and Pre-emptive Quality audits of incoming designs. This is a great opportunity to join a team of talented individuals working on state-of-the-art complex SoC Designs as part of Intel Foundry Design Services and Reference Design Development teams. - Integration and generation of layout and netlist views of different levels of hierarchy up to SoC. - Layout verification and signoff for IP blocks, APR partition, and SoC levels of hiera...

As a Physical Design Integration Engineer for custom GPU designs at Intel, your role involves performing physical design integration of Gfx, Media, and SOC designs. You will be responsible for Layout verification, reviewing at various milestones, and providing timely feedback to all cross domains like Floorplan, RDL, PDN, and Clock. Your primary responsibility will be to ensure the blocks Tape in quality with timely fixes and a correct by construction approach. - Perform physical design integration of Gfx, Media, and SOC designs - Conduct layout verification and review at various milestones - Provide timely feedback to cross domains such as Floorplan, RDL, PDN, and Clock - Ensure blocks tape...

As an experienced ASIC hardware architect, you will play a vital role in developing custom silicon solutions for Google's direct-to-consumer products. Your contributions will drive innovation in products that are loved by millions worldwide. You will have the opportunity to shape the next generation of hardware experiences, focusing on performance, efficiency, and integration. **Key Responsibilities:** - Define and deliver the hardware Multimedia/Graphics ASIC IP architecture to meet power, performance, area, and image quality goals from inception to product launch. - Collaborate with software, system, and algorithm engineers to co-develop and specify hardware IP architectures for integratio...

Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 8 years of experience in ASIC development with Verilog/SystemVerilog, VHDL. Experience with ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT). Experience in micro-architecture and design of IPs and subsystems in Networking domain such as packet processing, bandwidth management, congestion control, etc. Preferred qualifications: Experience with scripting languages (e.g., Python or Perl). Experience in SoC designs and integration flows. Knowledge of high performance and low power design technique...

In this role, you'll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You'll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. You will be part of a team developing SoCs used to accelerate machine learning computation in...

In this role, you'll be part of a team working on shaping the future of AI/ML hardware acceleration, specifically focusing on cutting-edge TPU (Tensor Processing Unit) technology. Your main responsibilities will include: - Driving the development of Complex IPs and Subsystems in collaboration with a team of engineers in the Bengaluru design organization. - Taking ownership of the micro-architecture and implementation of IPs and subsystems. - Collaborating with Architecture, Firmware, and Software teams to ensure feature closure and develop micro-architecture specifications. - Leading design methodology, libraries, debug, and code review activities in coordination with other IPs Design Verifi...

Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 10 years of experience in ASIC development with Verilog/SystemVerilog, Vhsic Hardware Description Language (VHDL). Experience in micro-architecture and design IPs and Subsystems. Experience in ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT). Preferred qualifications: Experience with scripting languages (e.g., Python or Perl). Experience in SoC designs and integration flows. Knowledge of bus architectures, fabrics/NoC, processor design, accelerators, or memory hierarchies.. Knowledge of hig...

As an experienced professional in ASIC development with a background in Electrical Engineering, Computer Engineering, or related fields, you will play a crucial role in shaping the future of AI/ML hardware acceleration. Your primary responsibility will be to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. Working within a dynamic team environment, you will contribute to the innovation behind products loved by millions worldwide, focusing on verifying complex digital designs with a specific emphasis on TPU architecture and its integration within AI/ML-driven systems. Your role will also involve collaborating with cross-functio...

You have a Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. Additionally, you have 10 years of experience in ASIC hardware architecture and silicon design. Ideally, you also possess a Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, with a focus on computer architecture. Your background includes experience with processor core architectures (such as ARM, x86, RISC-V, etc.) and IPs commonly used in SoC designs. Moreover, you have expertise in architecting and designing low power ASIC hardware IP for complex SoCs in various areas like camera ISP, video codecs, dis...

As an experienced professional in ASIC development with a Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, you will be leading a team of engineers in Bengaluru to deliver AI/ML compute intensive IPs and subsystems. With 8 years of experience in Verilog/SystemVerilog, VHDL, or Chisel, and 4 years of people management expertise, you will collaborate with Architecture, Firmware, and Software teams to drive feature closure and develop microarchitecture specifications. Your responsibilities will include taking ownership of complex IPs or subsystems, implementing RTL, and driving design methodology, libraries, debug, and code review in coordi...

Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. You should possess at least 5 years of experience in ASIC development with Verilog/SystemVerilog and VHDL. It is essential to have experience in ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT). Additionally, experience in micro-architecture and design of subsystems is required. Preferred qualifications: Ideally, you should have experience in SoC designs and integration flows. Proficiency in scripting languages such as Python or Perl would be beneficial. Knowledge of high performance and low p...

Understand Standard Specifications/ the functional specifications/ feature enhancements for the product and create micro-architecture and detailed design for some of the components of the Test Environment for the DesignWare family of synthesizable cores in protocol areas such as Ethernet/DSC/AMBA (AMBA2, AXI, CHI)/ SD/eMMC/DDR/PCIe/ USB/ MIPI Be an individual contributor in the Verification Tasks - Architect testbenches, coding of TE, debug, verification coverage improvement, etc. Will contribute to technical review of TE Code of medium complexity. Will contribute to technical process and quality improvement to achieve high quality deliveries Will be expected to Solve complex/ abstract probl...