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2.0 - 6.0 years
0 Lacs
karnataka
On-site
A career in our Advisory Acceleration Centre is the natural extension of PwC's leading-class global delivery capabilities. We provide premium, cost-effective, high-quality services that support process,
Posted 3 days ago
5.0 - 9.0 years
0 Lacs
karnataka
On-site
Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. You should possess at least 5 years of experience in ASIC development with Verilog/SystemVerilog and VHDL. It is essential to have experience in ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT). Additionally, experience in micro-architecture and design of subsystems is required. Preferred qualifications: Ideally, you should have experience in SoC designs and integration flows. Proficiency in scripting languages such as Python or Perl would be beneficial. Knowledge of high performance and low power design techniques is preferred, along with an understanding of arithmetic units, bus architectures, processor design, accelerators, or memory hierarchies. About the job: As a member of our team, you will contribute to shaping the future of AI/ML hardware acceleration, focusing on cutting-edge TPU (Tensor Processing Unit) technology that drives Google's most demanding AI/ML applications. Your responsibilities will involve verifying complex digital designs, specifically related to TPU architecture and its integration within AI/ML-driven systems. You will work on ASICs used to enhance data center traffic, collaborating with various teams to deliver high-quality designs for next-generation data center accelerators. Innovation, problem-solving, and evaluation of design options will be key aspects of your role, with a focus on micro-architecture and logic solutions. The ML, Systems, & Cloud AI (MSCA) organization at Google is responsible for designing, implementing, and managing the hardware, software, machine learning, and systems infrastructure for all Google services and Google Cloud. Prioritizing security, efficiency, and reliability, the team works towards shaping the future of hyperscale computing, impacting users worldwide. Responsibilities: - Own microarchitecture and implementation of subsystems in the data center domain. - Collaborate with Architecture, Firmware, and Software teams to drive feature closure and develop microarchitecture specifications. - Perform Quality check flows like Lint, CDC, RDC, VCLP. - Drive design methodology, libraries, debug, and code review in coordination with other IPs Design Verification (DV) teams and physical design teams. - Identify and implement power, performance, and area improvements for the domains owned.,
Posted 1 week ago
10.0 - 14.0 years
0 Lacs
hyderabad, telangana
On-site
You are Silicon Labs, a leader in secure, intelligent wireless technology for a more connected world. Your integrated hardware and software platform, intuitive development tools, unmatched ecosystem, and robust support make you the ideal long-term partner in building advanced industrial, commercial, home, and life applications. You make it easy for developers to solve complex wireless challenges throughout the product lifecycle and get to market quickly with innovative solutions that transform industries, grow economies, and improve lives. The Digital Architecture team at Silicon Labs is responsible for the research and development of digital architecture and IPs from concept to production. The team develops compute engines (AI/ML), processors (RISC-V), Audio and Video subsystems, accelerators, peripherals, bus fabric, internal communication systems, and system IP. The team focuses on IC architectures for multi-core, multithreaded SoCs with an energy-efficient compute backbone for IoT connectivity, security, and sensing subsystems. They engage in advanced research and development, high-level modeling, and architecture definition, valuing innovation, simplicity, quality, and smart development processes within a highly collaborative and learning-driven team. As a Staff Digital Architect at Silicon Labs, you will be responsible for designing and implementing robust digital architectures that support the business objectives of providing power-efficient, computation-intensive solutions for low-power embedded wireless devices. This role demands a deep understanding of digital technologies, strong analytical skills, and effective collaboration with cross-functional teams including IC and IP design, modeling, software, application, and marketing teams. Your responsibilities will include designing scalable and innovative digital architectures, leading technology evaluations and selections, collaborating with stakeholders to translate requirements into technical solutions, ensuring security, performance, and reliability of digital systems, providing technical leadership and mentorship, staying updated with industry trends, and documenting architectural solutions clearly. Required Experience & Skills: - Demonstrated experience in defining and designing high-complexity designs - Excellent understanding of embedded systems, hardware-software partitioning, performance, and power tradeoffs - Excellent verbal and written communications skills - Good understanding of low power design, HDL-based RTL logic design, front-end design tools, debug methodologies, and design for test and manufacturing Preferred Experience & Skills: - Experience in design of microprocessors, math-centric designs, and high-level software languages for modeling - Scripting skills in BASH, UNIX commands, Python, Perl, etc. Benefits & Perks: - Equity Rewards (RSUs) - Employee Stock Purchase Plan (ESPP) - Insurance plans with Outpatient cover - National Pension Scheme (NPS) - Flexible work policy - Childcare support Join Silicon Labs, where every engineer makes a significant impact on the product, and where you'll find a good work/life balance in a welcoming and fun environment.,
Posted 1 week ago
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