Senior/Staff PCB Layout Engineer

• Collaborate with hardware design teams across multiple projects to develop complex and innovative designs, from consideration of mechanical and thermal requirements, footprint creation and component placement to optimising power planes and routing of high-speed parallel and serial signals
• Finalise designs to deliver production data packs (ODB++, Gerber, Fabrication and Assembly drawings and BOMs)
• You will utilise and develop your skills to design PCBs for complex compute platforms to meet the requirements of the project team and our customers whilst ensuring optimal performance and manufacturability

Required Skills and Experience:

• 5+ years experience of designing complex, impedance controlled multi-layer (>20), conventional and HDI PCBs with very high pin count devices (>2000), high-speed interfaces (PCIe and DDR), differential pairs, including accommodating high-current PDNs.
• Experience of working alongside a chip packaging team. Able to influence and advise on pinout and routing topologies of SoCs or complex FPGA devices, cost optimisation, routing feasibility and layer trade-off analysis.
• Detailed knowledge of escape routing of high density SoCs, FPGAs, able to provide estimates of the IO count that can be routed with a particular stack-up and rule set.
• Appreciation of Signal Integrity and Power Integrity as applicable to routing strategies.
• Extensive knowledge of the PCB fabrication process (conventional and sequential), IPC standards and stackup topologies, substrate materials, via structures and design rules.
• Proficient in the use of EDA Tools, specifically Cadence OrCAD CIS, Allegro PCB suite.
• Ability to collaborate with PCB fabricators and CEMs for DFM/DFT and automated assembly. Ensure designs are aligned with supplier capabilities and best practise.
• Good interpersonal skills. Participate in reviews, providing advice to engineers relating to design rules, PCB fabrication and substrate technologies.

Nice To Have Skills and Experience:

• Certified Interconnect Designer (CID, CID+)
• Experience with version control systems (e.g. SVN)
• Experience of automating: decoupling capacitor optimisation, IC placement optimisation, drawing templates etc.