SENIOR VERIFICATION ENGINEER

Wafer Space is looking for smart and enterprising Design Verification engineers to join the team and engage in cutting-edge work within a dynamic and exciting work environment. We are currently involved in various in-house turnkey projects and client site projects, many of which require comprehensive verification from specification to closure, including the development of complete DV environments in SV-UVM. As a Design Verification Engineer at Wafer Space, your responsibilities will include building SV, SV UVM, OVM based environments and working with a variety of networking and other protocols. The role requires 3 to 7 years of experience in IP verification, with a strong background in SV/UVM based verification projects and excellent debugging skills. Experience in constructing components such as Scoreboard, functional coverage, and writing sequences using SV/UVM based Verification environments is essential for this position. Additionally, expertise in one of the following areas is highly desirable: - Experience in Video/Display domain, particularly DP, oLDI, MIPI CSI/DSI - Experience in high-speed protocols such as USB3, PCIe, MIPI, Unipro, etc. If you are passionate about design verification, possess the required skills and experience, and are seeking an opportunity to work on challenging projects in a collaborative and engaging environment, we would love to hear from you. Join Wafer Space and be a part of our innovative team where work is always fun and exciting.,