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4.0 - 15.0 years
0 Lacs
karnataka
On-site
You are being sought out as an experienced Senior/Lead ASIC Verification Engineer to join the Bangalore VIP team. With 4 to 15 years of experience across multiple roles, you are expected to have a strong background in Verification, particularly using industry-standard protocols and methodologies. Your proficiency should include hands-on experience with System Verilog and Verilog, along with a solid understanding of Object-Oriented Programming. Your responsibilities will include, but are not limited to: - Contributing to the development of the VIP - Reviewing and providing sign-off on VIP development and updates from a technical perspective, encompassing methodology and protocol functionaliti...
Posted 4 days ago
5.0 - 15.0 years
0 Lacs
noida, uttar pradesh
On-site
As a Senior/Lead ASIC Verification Engineer at our Noida-VIP team, you will be a key player with 5 to 15 years of experience in Verification. Your expertise in System Verilog, Verilog, and Object-Oriented Programming will be put to the test as you lead the development of reusable Verification environments on multiple projects using VMM, OVM, or UVM methodologies. Your knowledge should span across various protocols such as UCIe, PCIe, CXL, Unipro, USB, MIPI, HDMI, Ethernet, DDR, LPDDR, and HBM memory. Your responsibilities will include: - Contributing to the development of the VIP - Reviewing and signing off on VIP development and updates - Collaborating with Architects and methodology expert...
Posted 5 days ago
10.0 - 12.0 years
0 Lacs
bengaluru, karnataka, india
On-site
Principal Verification Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an experienced and innovative ASIC Digital Design Principal Engineer with a passion for verification and a keen eye for detail. With a strong background in architecting verification environments for complex serial protocols, you are proficie...
Posted 1 month ago
10.0 - 12.0 years
0 Lacs
bengaluru, karnataka, india
On-site
Required Skills and Experience: 10+ years of proven experience in working on IP/Subsystem/Soc Verification Experienced in Protocol on Flash Storage device Controller with unipro and MIPI PHY. Experience in Working on any of cross functional flows like Reset, Ras(Error and Interrupt), Security, low Power for High-speed IO IPs. Good Skills in System Verilog, shell programming/scripting (e.g. Tcl, Perl, Python etc.) Experienced in one or more of various verification methodologies UVM, formal and low power. Exposure to all stages of verification: requirements collection, creation of test plans, testbench implementation, test cases development, documentation, and support. Experience with various ...
Posted 2 months ago
4.0 - 9.0 years
4 - 9 Lacs
bengaluru, karnataka, india
On-site
Job Requirements An expert level experience with UFS/Unipro/MPHY IP/sub-systems. Highly experienced with defining block, sub-system and SOC top level test plans. An expert level with developing UVM-based SV test-benches. Deep understanding and knowledge of verification methodologies flows and quality metrics. Great debugging and problem-solving skills. Team player with great interpersonal communication skills. Job Qualifications At least 5 years of relevant experience in UFS/Unipro/MPHY verification. Strong and relevant expertise with ASIC simulation tools and advanced verification methods. Expert level in verification languages such as UVM and System Verilog. Relevant experience with writin...
Posted 2 months ago
5.0 - 9.0 years
5 - 9 Lacs
bengaluru, karnataka, india
On-site
Job Requirements An expert level experience with UFS/Unipro/MPHY IP/sub-systems. Highly experienced with defining block, sub-system and SOC top level test plans. An expert level with developing UVM-based SV test-benches. Deep understanding and knowledge of verification methodologies flows and quality metrics. Great debugging and problem-solving skills. Team player with great interpersonal communication skills. Job Qualifications At least 5 years of relevant experience in UFS/Unipro/MPHY verification. Strong and relevant expertise with ASIC simulation tools and advanced verification methods. Expert level in verification languages such as UVM and System Verilog. Relevant experience with writin...
Posted 2 months ago
5.0 - 15.0 years
0 Lacs
noida, uttar pradesh
On-site
We are seeking experienced Senior/Lead ASIC Verification Engineers to join our Noida-VIP team. With 5 to 15 years of experience in Verification, you will be involved in utilizing industry-standard protocols and methodologies. Your proficiency in System Verilog and Verilog, along with a solid understanding of Object Oriented Programming, will be essential for this role. As a Senior/Lead ASIC Verification Engineer, you will have the opportunity to lead the development of reusable Verification environments for a minimum of 2 projects using VMM, OVM, or UVM methodologies. Your expertise in protocols such as UCIe, PCIe, CXL, Unipro, USB, MIPI, HDMI, Ethernet, DDR, LPDDR, and HBM memory protocol w...
Posted 3 months ago
3.0 - 7.0 years
0 Lacs
karnataka
On-site
Wafer Space is looking for smart and enterprising Design Verification engineers to join the team and engage in cutting-edge work within a dynamic and exciting work environment. We are currently involved in various in-house turnkey projects and client site projects, many of which require comprehensive verification from specification to closure, including the development of complete DV environments in SV-UVM. As a Design Verification Engineer at Wafer Space, your responsibilities will include building SV, SV UVM, OVM based environments and working with a variety of networking and other protocols. The role requires 3 to 7 years of experience in IP verification, with a strong background in SV/UV...
Posted 3 months ago
5.0 - 15.0 years
0 Lacs
noida, uttar pradesh, india
On-site
We are looking for experienced Senior/Lead ASIC Verification Engineers for our Noida-VIP team. Does this sound like a good role for you Experience : 5yrs to 15 years (multiple roles) Location: Noida Associated with Verification especially using industry-standard protocols & methodology Languages: Hands-on experience with System Verilog & Verilog . Should have a good understanding of Object Oriented Programming. Involved & played a driving role in the development of reusable Verification environments for at least 2 verification projects using VMM/OVM/UVM methodologies . Protocol experience: Should have experience on any of the UCIe/PCIe/CXL/Unipro/USB/MIPI/HDMI/Ethernet/DDR/LPDDR/HBM memory p...
Posted 3 months ago
5.0 - 10.0 years
0 Lacs
Bengaluru, Karnataka, India
On-site
Required Skills and Experience: 5-10 years of proven experience in working on IP/Subsystem/Soc Verification Experienced in Protocol on Flash Storage device Controller with unipro and MIPI PHY. Experience in Working on any of cross functional flows like Reset, Ras(Error and Interrupt), Security, low Power for High-speed IO IPs. Good Skills in System Verilog, shell programming/scripting (e.g. Tcl, Perl, Python etc.) Experienced in one or more of various verification methodologies UVM, formal and low power. Exposure to all stages of verification: requirements collection, creation of test plans, testbench implementation, test cases development, documentation, and support. Experience with various...
Posted 4 months ago
5.0 - 15.0 years
0 Lacs
noida, uttar pradesh
On-site
We are seeking experienced Senior/Lead ASIC Verification Engineers to join our Noida-VIP team. With 5 to 15 years of experience in Verification, particularly using industry-standard protocols and methodologies, this role offers a challenging opportunity for individuals well-versed in System Verilog, Verilog, and Object-Oriented Programming. As a successful candidate, you will have demonstrated your ability to lead the development of reusable Verification environments on at least 2 projects using VMM, OVM, or UVM methodologies. Your expertise should extend to protocols such as UCIe, PCIe, CXL, Unipro, USB, MIPI, HDMI, Ethernet, DDR, LPDDR, and HBM memory. Your responsibilities will include co...
Posted 4 months ago
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