Senior Verification Engineer

As a Verification Engineer at our leading international semiconductor team, you will play a crucial role in ensuring the functionality, performance, and quality of advanced chip designs. Your responsibilities will include: - Developing and executing verification plans using SystemVerilog and UVM - Performing block-level, subsystem, and top-level verification - Working with formal and dynamic verification methods - Driving regression testing and automation using scripting languages - Collaborating closely with design teams to resolve complex verification challenges - Utilizing version control and industry-standard verification methodologies To qualify for this role, you should meet the following requirements: - Masters or PhD in Electronics, Computer Science, or related field - 8+ years of industrial experience in verification - Proficiency in SystemVerilog and UVM - Strong knowledge of simulation methodologies and tools - Hands-on experience with scripting languages (Python, Perl, Bash, TCL) - Familiarity with regression tools and version control systems (git, svn) - Proven experience in formal and dynamic verification - Strong problem-solving abilities and attention to detail - Excellent teamwork and communication skills Joining our team presents a unique opportunity to work on cutting-edge semiconductor projects. Take the next step in your career in semiconductor verification by applying today. Send your resume to hr@geesesquads.com.,