Senior Member of Technical Staff

Siemens

8 - 13 years

10 - 14 Lacs

noida

Posted:1 month ago| Platform:

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Skills Required

algorithms c++ data structures unix linux platform sta physical design software design simulation machine learning vhdl artificial intelligence verilog formal verification timing closure pnr linux perl system verilog ml

Work Mode

Work from Office

Job Type

Full Time

Job Description

Key Responsibilities
:

We are looking for a highly motivated software engineer to work in the QuestaSim R&D team of the Siemens EDA

Development responsibilities will include core algorithmic advances and software design/architecture.
You will collaborate with a senior group of software engineers contributing to final production level quality of new components and algorithms and to build new engines and support existent code.
Self-motivation, self-discipline and the ability to set personal goals and work consistently towards them in a dynamic environment will go far towards contributing to your success.

Are you excited to know more about this Role ?

Job Qualification:

An ideal candidate should have skills below:

B.Tech or M.Tech in Computer Science & Engineering (CSE), Electrical Engineering (EE), or Electronics & Communication Engineering (ECE) from a reputable engineering institution having 8 - 15 years of experience.
Strong knowledge of C/C++, algorithms, and data structures.
Familiarity with compiler concepts and optimizations.
Experience with UNIX and/or LINUX platforms is essential.
Excellent problem-solving and analytical skills.
Self-motivated with the ability to work independently and guide others towards successful project completion.

We are not looking for superheroes, just super minds!

Having the below skills will be an added advantage:

Strong understanding of basic digital electronics concepts.
Familiarity with machine learning (ML) and artificial intelligence (AI) algorithms, particularly their implementation in data-driven tasks.
Proficiency in hardware description languages such as Verilog, SystemVerilog, and VHDL.
Experience with parallel algorithms and job distribution techniques.
Exposure to simulation or formal verification methodologies is a plus.

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