Senior GLS Verification Engineer

Eteros Technologies

4 - 6 years

30 - 35 Lacs

bengaluru

Posted:2 days ago| Platform:

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Skills Required

rtl design automation c++ c simulation architecture soc system verilog python testing

Work Mode

Work from Office

Job Type

Full Time

Job Description

Porting test-case from VCS to Xcelium environment
Debugging the TB issues and fix it for Xcelium
Collaborate closely with architecture and RTL designteams to verify functional correctness of the design.
Develop detailed test plans and set up test environments accordingly.
Assist in building and enhancing verification & GLS flows, automationscripts, and regression infrastructure.
Write and implement tests using assembly, C/C++, SystemVerilog based ondefined test plans.
Design and implement checkers in SystemVerilog or C-based transactors tovalidate functionality.
Write assertions and apply formal verification techniques to improve designrobustness.
Build and maintain test benches; generate directed and constrained-randomtests.
Debug test failures, run simulations, and track down causes of bugs.
Create and maintain coverage monitors; analyze coverage data to ensure testplan completeness.
Manage verification schedules and contribute to cross-functional engineeringefforts.

Requirements

In-depth knowledge of digital logic design, CPU/SoCarchitecture, and micro-architecture.

Strong proficiency in SystemVerilog for design verification and verificationmethodologies

Solid experience in C/C++ programming & scripting languages such asPython or TCL

Good UVM skills

Understanding of the complex test-benches

Solid experience in Gate-Level Simulation
o Zero/Unit delay bringup
o Familiar with hybrid/black box methods
o SDF simulations

Benefits
Whats in itfor you

Work on leadingedge technologies

An opportunityfor career development and growth

Competitivecompensation

Exceptionalbenefits

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