1.0 - 5.0 years

0 Lacs

chennai, tamil nadu

On-site

As a first-level support intern, you will be responsible for providing assistance to users via email and chat to help resolve technical and functional issues related to company products. Your role will involve working under guidance to effectively resolve issues, following documented procedures, and escalating complex issues to relevant internal teams when necessary. It is crucial to report any issues that may impact business operations and ensure that all support interactions are properly logged in the internal ticketing system. Additionally, you will be expected to keep users and stakeholders informed during downtimes or system issues. To excel in this role, you should have a good understanding of SQL, at least 1+ years of experience in Production Support, familiarity with Linux/UNIX systems, databases (e.g., MySQL, SQL Server), and web technologies. Exposure to or a willingness to learn scripting or programming basics is essential. A proactive attitude, eagerness to learn, and a customer-first mindset will be key to your success in this position. Familiarity with ticketing tools, debugging, analytical skills, AWS Cloud, Excel, and documentation tools are also desired. Strong communication skills, both written and verbal, are important for effective collaboration with the team and stakeholders. This internship opportunity is based in Chennai/Bangalore with a hybrid work model. The role involves working in a day shift from Monday to Friday in person. Join us for a 6-month contract length and contribute to accurate and timely reporting of support metrics.,

Posted 1 week ago

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Performance Modeling Engineer Mirabilis Design Incorporation

2.0 - 7.0 years

9 - 19 Lacs

Chennai

Remote

Role & responsibilities Mirabilis Design is seeking a Performance Modeling Engineer with a deep understanding of computer architecture to explore and optimize the performance of processor cores, interconnects, and memory subsystems. The ideal candidate will be passionate about architecture-level performance analysis, with a strong theoretical foundation in pipelines, caching, and communication networks. The selected candidate will develop system-level models of emerging electronics standards to cycle-accurate details. This will include a clear understanding of computer architecture, how pipelines work, identify where there are latencies, power consumption of a semiconductor or electronics device, processor pipelines, interconnect, interfaces and memories. The models will be constructed using a combination of VisualSim Architect, VisualSim Script, Java and SystemC. Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field. 3+ years of experience in architecture modeling, simulation, or performance analysis of compute systems. Strong understanding of: Processor pipelines (in-order, out-of-order) Cache coherency and memory hierarchies (L1-L3, shared memory) On-chip interconnects (AMBA, NoC, mesh) Queuing theory and throughput/latency trade-offs Experience with one or more simulation tools (e.g., VisualSim Architect, Gem5, SystemC, Simics, etc.) Proficient in C/C++, Python, and scripting for model development and automation. Preferred candidate profile The preferred candidate must have developed performance or power models in the last two or three years. They should be aware of key concepts of systems and semiconductors, in theory. Also, they should understand the pipeline, knowledge of queuing theory, power consumption, and good programming skills. It is preferred they understand and have worked on interconnects (NoCs, AXI bus), Processors (Cortex, Power, RISC-V), Memory Controllers (Synopsys or Cadence), DDR Memory, custom accelerators such as GPU, NPU and AI engines. For recent graduates, they must have done at least one simulation project in class or in an internship. Develop system-level performance models for CPUs, memory hierarchies, and on-chip networks using tools such as VisualSim Architect. Evaluate architecture trade-offs, identify bottlenecks, and propose optimizations for throughput, latency, and power efficiency. Analyze performance of workloads and task schedules across complex compute architectures including CPUs, GPUs, and NPUs. Work closely with hardware architects, software teams, and product managers to guide design decisions. Contribute to the development and validation of simulation libraries and reusable IP models. Preferred Qualifications Experience with ARM architecture, CMN-600, or Arteris NoC. Exposure to machine learning accelerators or heterogeneous SoCs. Familiarity with power modeling and thermal constraints at system level. Experience working with task schedulers or real-time systems.

Posted 1 month ago

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