Posted:1 hour ago|
Platform:
Work from Office
Full Time
Technologies from 28nm, 20nm, 14nm, 10nm, 7 nm. Block level floorplanning, power planning and IR drop analysis. Timing closure Multimode multi corner optimization and closure. Clock tree synthesis and advanced clock tree implementation. Block level timing closure with sign off STA . Block level ECO implementation involving netlist level logical changes. Library performance analysis and fine tuning for implementation. Excellent debugging skills in implementation issues and ability to come up with creative solutions.
Sivaltech
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