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Mixed Signal Functional Design Verification Engineer

5 - 8 years

20 - 30 Lacs

Bengaluru

Posted:1 day ago| Platform: Naukri logo

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Skills Required

System Verilog Models for the Analog blocks. erification techniques including assertions to Mix Signal designs. Understanding of adding connect module at the interaction of schematic and model while running AMS simulations.

Work Mode

Work from Office

Job Type

Full Time

Job Description

Bachelor's degree with 5+ years of experience, Computer Engineering, or Electronic/Electrical Engineering. Demonstrated experience in ASIC design verification methodologies and flows. Develop detailed and comprehensive test plans. Develop verification test benches in SV/UVM at block, inter-block, and chip levels. Apply innovative verification techniques including assertions to Mix Signal designs. Participate in the review of design verification coding and coverage metrics. Work collaboratively with the team to develop & incorporate the latest test technologies & processes. Preferred experience of System Verilog Models for the Analog blocks. Understanding of adding connect module at the interaction of schematic and model while running AMS simulations. Role & responsibilities Preferred candidate profile

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