Job
Description
We provide VLSI design expertise to global customers with quality, timeliness and cost-effectiveness - IC design implementation from RTL to netlist including synthesis, timing constraint composing - IC physical implementation from netlist to GDSII, including floor planning, power grid implementation, place and route, clock tree synthesis, timing ECO, design closure - IC design verification including timing analysis, timing signoff, formal verification and low power verification. - IC physical verification including physical verification, crosstalk analysis, power analysis, ESD analysis, EM analysis Responsibilities : - Team Leadership : Lead and manage a team of physical design engineers responsible for implementing IC designs from RTL (Register Transfer Level) to GDS (Graphic Data System) using industry-standard tools and methodologies. - Project Planning : Develop project plans, schedules, and resource allocation for physical design projects, ensuring timely and high-quality delivery of IC designs. - Physical Design Flow : Define and optimize the physical design flow, including floor planning, power planning, placement, routing, clock tree synthesis, and timing closure, to meet design goals and performance targets. - Design Methodology : Implement and improve physical design methodologies, guidelines and best practices to enhance productivity, quality, and design scalability. - Tool Evaluation and Selection : Evaluate and select physical design tools, EDA (Electronic Design Automation) software, and technologies to support design requirements and optimize design efficiency. - Design Verification Support : Collaborate with design verification teams to ensure physical design readiness for tape-out, including DRC (Design Rule Check), LVS (Layout vs. Schematic), and ERC (Electrical Rule Check) verification. - Cross-functional Collaboration : Work closely with RTL design teams, architecture teams, verification teams, and backend teams to address design challenges, resolve issues, and optimize design performance. - Quality Assurance : Implement quality assurance processes, checks, and reviews to ensure compliance with design rules, standards, and specifications. - Documentation : Maintain documentation related to physical design methodologies, design constraints, design reviews, and tape-out procedures. Qualifications : - Education : Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field, with a focus on VLSI (Very Large Scale Integration) design or physical design. - Experience : Several years of experience in physical design of complex IC products, including experience in a leadership or management role overseeing physical design projects. - Physical Design Tools : Proficiency in using industry-standard physical design tools such as Cadence Innovus, Synopsys ICC, Mentor Calibre, etc., and familiarity with EDA tools for timing analysis, power analysis, and physical verification. - Design Methodologies : Knowledge of advanced physical design methodologies, including floor planning, placement optimization, routing strategies, clock tree synthesis, and timing closure techniques.
