665 Pcie Jobs - Page 3

Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: 3 to 6 Years of Experience in the Linux embedded domain to design, develop and support software solutions on multi-core ARM/CPUs, Strong C/C++ programming skills. Embedded Platforms experience including low-level drivers and firmware, kernel and user-space components on Automotive Grade Linux and Yocto build system for developing and maintaining the software stack for IVI and ADAS systems . Design and development of software for heterogeneous compute platforms consisting of ARMs, GPUs, DSPs, and specialized hardware accelerators in an embedded SoC systems with J-TAG or ICE debuggers; Experience in real-time SW development for embedded products. Hands on experience in leading medium to large technical teams. Hands on experience of driver development on any RTOS and Linux userspace on AGL framework . Detailed understanding SoC hardware blocks - Clocks, PLLs, GPIO, Interrupt Controllers (GIC), Peripherals (SPI/I2C/PCIE/CAN/Ethernet/USB/UFS), power management. Experience in Linux kernel architecture, device drivers and memory management. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 1+ year of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field. 2+ years of academic or work experience with Programming Language such as C, C++, Java, Python, etc. Motivated self-starter with excellent verbal and written communication skills, demonstrated ability to work with engineers/partners/customers across different geographies. Demonstrated experience working with senior management in a corporate environment. Demonstrated experience in business process streamlining and transformation that includes disciplined approach to digitized services enabling. Hands-on technical lead who is not hesitant to dig into the details where needed to get first-hand knowledge of the issues and play an active and personal role in steering team success. Experience in ISO26262/functional safety and safe Linux is highly recommended. Exposure to one or more of below technology areas is a plus:- Multiprocessor Architecture, ARM processors, caching, interrupts, etc., Virtualization technologies across CPU and MM hardware accelerators Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Bachelors /Masters degree in Engineering Relevant experience of 6+yrs in any of the mentioned domain - Verification/ Emulation/ Validation Verification: Strong knowledge of digital design and SOC architecture. Good understanding of OOP concepts Experience in HVL such as System Verilog, UVM/OVM & System C Experience in HDL such as Verilog Knowledge of ARM/DSP CPU architecture, High Speed Peripherals like USB2/3, PCIE or Audio/Multimedia Familiarity with Power-aware Verification, GLS, Test vector generation is a plus Exposure to Version managers like Clearcase/perforce FPGA Emulation : Familiarity with Verilog/Vhdl and General Digital Logic Design concepts Knowledge of system-level architecture including buses like ARM processor bringup, AXI/AHB, bridges, memory controllers such as DDR/Nand. Knowledge of peripheral emulation like PCIE/USB is a plus. Strong working knowledge of UNIX environment and scripting languages such as Perl or shell Working knowledge XILINX Virtex FPGA architecture and experience with ISE tool flow Pre/Post silicon Validation: ARM based System-On-Chip Pre-Silicon emulation and Post-Silicon ASIC Validation experience related to board bring up and debug. Perform system level validation and debug Debug experience with Lauterbach Trace32 environment. Test equipment like Logic analyzer, Oscilloscope and Protocol analyzers. Embedded software development of low level hardware drivers in C language. Working experience related to one or more of the following is required. ARM/DSP Processors/USB/PCIE, Ethernet Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Good knowledge on AMBA protocols (CHI/AXI/AHB) Knowledge of ARM architecture be an added advantage Exposure to low power methodology with understanding of UPF Execute verification plans, regression enabling for all features and, debug of the test failures Hands-on experience of GLS and timing simulations Exposure to Formal verification Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: 20+ Years of Experience in the Linux embedded domain to design, develop and support software solutions on multi-core ARM/CPUs, Strong C/C++ programming skills. Embedded Platforms experience including low-level drivers and firmware, kernel and user-space components on Automotive Grade Linux and Yocto build system for developing and maintaining the software stack for IVI and ADAS systems . Design and development of software for heterogeneous compute platforms consisting of ARMs, GPUs, DSPs, and specialized hardware accelerators in an embedded SoC systems with J-TAG or ICE debuggers; Experience in real-time SW development for embedded products. Hands on experience in leading medium to large technical teams. Hands on experience of driver development on any RTOS and Linux userspace on AGL framework . Detailed understanding SoC hardware blocks - Clocks, PLLs, GPIO, Interrupt Controllers (GIC), Peripherals (SPI/I2C/PCIE/CAN/Ethernet/USB/UFS), power management. Experience in Linux kernel architecture, device drivers and memory management. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 8+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 7+ years of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 6+ years of Software Engineering or related work experience. 4+ years of work experience with Programming Language such as C, C++, Java, Python, etc. Motivated self-starter with excellent verbal and written communication skills, demonstrated ability to work with engineers/partners/customers across different geographies. Demonstrated experience working with senior management in a corporate environment. Demonstrated experience in business process streamlining and transformation that includes disciplined approach to digitized services enabling. Hands-on technical lead who is not hesitant to dig into the details where needed to get first-hand knowledge of the issues and play an active and personal role in steering team success. Experience in ISO26262/functional safety and safe Linux is highly recommended. Exposure to one or more of below technology areas is a plus:- Multiprocessor Architecture, ARM processors, caching, interrupts, etc., Virtualization technologies across CPU and MM hardware accelerators Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: 3 to 15 years of work experience in ASIC/SoC Design Experience in Logic design /micro-architecture / RTL coding is a must. Must have hands on experience with SoC design and integration for complex SoCs. Experience in Verilog/System-Verilog is a must. knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required. Understanding of constraint development and timing closure is a plus. Experience in Synthesis / Understanding of timing concepts is a plus. Experience creating padring and working with the chip level floorplan team is an added advantage. Excellent oral and written communications skills Proactive, creative, curious, motivated to learn and contribute with good collaboration skills. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: 6 to 9 Years of Experience in the Linux embedded domain to design, develop and support software solutions on multi-core ARM/CPUs, Strong C/C++ programming skills. Embedded Platforms experience including low-level drivers and firmware, kernel and user-space components on Automotive Grade Linux and Yocto build system for developing and maintaining the software stack for IVI and ADAS systems . Design and development of software for heterogeneous compute platforms consisting of ARMs, GPUs, DSPs, and specialized hardware accelerators in an embedded SoC systems with J-TAG or ICE debuggers; Experience in real-time SW development for embedded products. Hands on experience in leading medium to large technical teams. Hands on experience of driver development on any RTOS and Linux userspace on AGL framework . Detailed understanding SoC hardware blocks - Clocks, PLLs, GPIO, Interrupt Controllers (GIC), Peripherals (SPI/I2C/PCIE/CAN/Ethernet/USB/UFS), power management. Experience in Linux kernel architecture, device drivers and memory management. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 1+ year of Software Engineering or related work experience. 2+ years of academic or work experience with Programming Language such as C, C++, Java, Python, etc. Motivated self-starter with excellent verbal and written communication skills, demonstrated ability to work with engineers/partners/customers across different geographies. Demonstrated experience working with senior management in a corporate environment. Demonstrated experience in business process streamlining and transformation that includes disciplined approach to digitized services enabling. Hands-on technical lead who is not hesitant to dig into the details where needed to get first-hand knowledge of the issues and play an active and personal role in steering team success. Experience in ISO26262/functional safety and safe Linux is highly recommended. Exposure to one or more of below technology areas is a plus:- Multiprocessor Architecture, ARM processors, caching, interrupts, etc., Virtualization technologies across CPU and MM hardware accelerators Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Experience in Logic design /micro-architecture / RTL coding is a must. Must have hands on experience with SoC design and integration for complex SoCs. Experience in Verilog/System-Verilog is a must. Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Hands on experience in constraint development and timing closure Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Experience in Synthesis / Understanding of timing concepts for ASIC is required. Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience creating pad ring and working with the chip level floorplan team is an added advantage Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required . Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Preferred Qualifications 2-9 years of experience in SoC design Educational Requirements2+ years of experience with a Bachelors/ Masters degree in Electrical engineering Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail myhr.support@qualcomm.com or call Qualcomm's toll-free number found here . Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Where Technical / Product Publications, Staff Engineer Bengaluru, Karnataka, India Apply Now Save Category: Engineering Hire Type: Employee Job ID 12356 Date posted 07/24/2025 Share this job Email LinkedIn X Facebook Who we are: Synopsys (NASDAQ: SNPS) is the biggest ASIC EDA software company and the 2nd largest semiconductor IP provider in the world. Founded in 1986, $5B+ Synopsys employs 20,000+ headquartered in Mountain View, California, located globally in over 25 countries with 113+ offices throughout North America, Europe, Japan, Asia, and India. We enable companies to create the leading-edge micro-chips found in the latest smartphones, data center servers; and automobile smart systems. Synopsys is committed to fostering an environment that treats people with respect, honesty, and professionalism. We only want the best of the best to join our team. Be ready to produce results; bring innovation, creativity, and passion to work every day. What you will do: As a tech savvy and passionate Technical Writer in the Solutions Group at Synopsys, you will be part of a group responsible for developing and writing user documentation for various Digital and Mixed Signal IPs. You will have an opportunity to work across the various IP product lines of USB, PCIe, Ethernet, DDR, HDMI, MIPI etc., You will be responsible for planning, organizing, writing, and editing the technical specifications, engineering schematics, application notes, and user guides. You will be interfacing with our Design Engineering team to collect the raw content of technical specification and to effectively transform this into user consumable collateral by following the doc-processes. You will work independently, interacting, and collaborating with multi-site teams and you will deliver high quality documentation by demonstrating strict adherence to the style guide and other doc-processes followed by the group. As a writer, you will collaborate with other teams and have a significant and immediate impact on all customer documentation produced and the documentation roadmap. Hard skills we are looking for: Degree or masters in any electronics, science, hardware, computing, software, physics, mathematics, or engineering discipline. Other technical disciplines also considered. 3-7 years technical writing experience in software or hardware industry Excellent problem-solving skills; strong logical reasoning and solution-oriented Experience with authoring tools such as FrameMaker Excellent English writing and speaking skills Soft skills we are looking for: Has excellent communication and interpersonal skills Energetic and capable of learning new technologies as necessary Team player and able to work independently with minimal supervision You care (about others, about doing a good job, about details) You take ownership of projects and tasks assigned to you with little to no supervision and have pride in quality work done correctly the first time Advantageous skill areas that will give you the edge: Familiarity with Verilog and ASIC digital design flows TCL Structured FrameMaker. XSLT and XPATH Structured FrameMaker EDD and DTD DITA, DocBook, or IP-XACT XML schemas FrameScript, ExtendScript, or FDK DITA Open Toolkit At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Now Save Relevant Jobs Analog Design, Sr Engineer Bengaluru, India Engineering Analog Design, Sr Engineer Bengaluru, India Engineering R&D Engineering, Sr Engineer Bengaluru, India Engineering

As an Embedded Systems Intern at Spicules, you will have the opportunity to be trained on cutting-edge technologies and skills essential for realizing the company's vision. Throughout your internship, you will acquire knowledge in various areas including: - Learning Embedded C & C++ - Understanding Microcontrollers and complex & powerful processors - Familiarizing yourself with Communications Protocols such as WiFi, BLE, I2C, I2S, PCIe, and GPIO - Gaining insights into Linux and Android To be eligible for this internship, you should have a minimum educational background of BE/B.Tech/ME/M.Tech in Computer Engineering or Electronics Engineering. Final year students in these fields are also encouraged to apply. Additionally, the ideal candidate would have 2-3 years of experience in the relevant field. Located in Ahmedabad, Spicules values its people as the most valuable assets. With a core value of "People First," the company is dedicated to investing in your personal and professional growth. Our organizational culture is characterized by its youthful, dynamic, and vibrant approach, providing ample opportunities for on-the-job learning, development, and growth. At Spicules, we prioritize nourishing our resources through regular training programs and opportunities to lead projects. Our work culture is fun, flexible, and expansive, offering new experiences, horizontal profile expansion, the freedom to pursue your passions through actual projects, and more. We embrace a non-traditional hierarchical system that allows even new employees to spearhead and lead projects. Transparency, openness, freedom of spirit and choices, as well as individual expression, are integral to our culture, which extends to both our clients and internal teams. Join us at Spicules and become part of our modern, progressive, and development-oriented workforce, where your personal and professional growth is a top priority.,

The culture at MarvyLogic is defined by its people. We foster a culture of passion for technology solutions that have a direct impact on businesses. We prioritize the pursuit of individual passions among our employees. Working with us offers you the opportunity to gain a comprehensive understanding of various industries and cutting-edge technologies. This exposure enables us to develop solutions that are not only forward-thinking but also highly impactful. Being a part of MarvyLogic can facilitate your personal growth, leading you towards a more fulfilling life. You should possess a Graduate Degree in Electrical/Electronics Engineering with over 10 years of experience (a post Graduate degree would be an added advantage). The job location is in Bengaluru/Bangalore. As a candidate for this position, you are expected to have a minimum of 10 years of experience in ASIC RTL Design and demonstrate proficiency in Verilog/System Verilog. Your expertise should extend to working with multiple clock and power domains. You should have a strong background in integrating and validating high-speed PCIe IP cores, including controllers and PHY SerDes. Experience with PCIe protocol analyzers and debugging is essential, as well as familiarity with PCIe driver and application software for both Linux and Windows environments. Your responsibilities will include RTL design and implementation of interface logic between PCIe controllers and DMA engines for high-performance networking applications. You will be required to create block-level micro-architecture specifications detailing interfaces, timing behavior, design tradeoffs, and performance objectives. Additionally, you will need to review vendor IP integration guidelines and ensure compliance throughout the design process. Running integrity check tools such as Lint/CDC/DFT/LEC/UPF to meet coding and implementation standards will also be part of your role. You will play a crucial role in the design verification process by reviewing test plans, coverage reports, writing assertions, and implementing design modifications to enhance verification quality. Furthermore, you will be involved in the physical implementation process by providing synthesis constraints, timing exceptions, and making design updates to achieve area, power, and performance targets. Key Responsibilities: - Collaborate effectively with multi-site teams - Conduct reviews of FPGA netlist releases (block/chip) - Demonstrate experience in the full ASIC product life cycle, including requirements, design, implementation, testing, and post-silicon validation.,

We are hiring RTL Design Engineers with strong expertise in developing high-performance digital designs for ASIC/SoC products. Contact-7982405927

You should have a minimum of 3 years of experience in System Verilog HVL and at least 3 years of experience in OVM/UVM/VMM/Test Harness. It is important to have hands-on experience in developing assertion, checkers, coverage, and scenario creation. You must have successfully executed at least 2 SoC Verification projects and possess experience in developing test and coverage plans, Verification environment, and validation plans. Knowledge of at least one industry standard protocol such as Ethernet, PCIe, MIPI, USB, or similar is required. Participation in reviews and audits is also expected. For management responsibilities, you should have a minimum of 2 years of experience in leading a team of 5 to 10 engineers. Your role will involve defining/deriving scope, estimation, schedule, and deliverables of proposed work. It is crucial to ensure the compatibility of resources, tools, and platforms, as well as working closely with customers through the acceptance of deliverables. Effective management of team members through coaching, mentoring, guidance, and career planning is essential for this role.,

As a Sr. Verification Engineer specializing in SOC Verification at SmartSoC, you will be responsible for the technical execution of complex ARM-based SOC Verification projects. Your role will involve test planning, environment architecture, and the development of SV-UVM environments. To succeed in this role, you should have 3-10 years of experience in Design Verification, with a strong expertise in SOC Verification. Excellent communication and presentation skills are essential, along with a deep knowledge of Verification methodologies such as Coverage Driven Test Planning, Environment Architecture, and Verification Flow. Proficiency in System Verilog and familiarity with methodologies like OVM, UVM, VMM, or RVM is required. Additionally, you should possess a solid understanding of protocols, including at least one of SATA, USB, Ethernet, or PCIE. The ability and willingness to adapt to new methodologies, languages, and protocols are crucial for success in this position. This opportunity falls under the VLSI (Silicon engineering) job category and is available in multiple locations, including India (Bangalore, Chennai, Hyderabad, Noida), Sweden (Stockholm), and the USA (Texas). If you are a driven and skilled SOC Verification expert looking to tackle challenging projects in a dynamic environment, we encourage you to apply and be a part of our innovative team.,

You will be a member of the FPGA development team designing and developing complex FPGAs for use in state-of-the-art embedded systems. As an FPGA Senior Design Engineer / Module Lead, you will be involved in requirements gathering, architecture and detailed design of FPGAs, coding, code walk, development of verification and validation plans, documentation of design, verification / validation, user guides, etc., technical reviews, maintaining Quality standards as per the Project Quality Guidelines and mentoring team members. Experience in architecture design, development and verification of complex FPGAs is crucial for this role. You should possess excellent RTL coding skills in Verilog/VHDL and be familiar with AMD (Xilinx) / Intel (Altera) / Lattice / Microchip FPGAs. Additionally, familiarity with AMD (Xilinx) ISE, Vivado / Intel (Altera) Quartus / Lattice Diamond / Microchip Libero FPGA tools is required. Experience in Functional verification using ModelSim and familiarity with high-speed interfaces such as PCIe, SPI-4.2, SFI-4.2, Gigabit Ethernet, UTOPIA, POS PHY, USB2/3, DDR3, SPI, UART, I2C, Aurora etc. is necessary. Exposure to FPGA Static Timing Analysis and knowledge of scripting languages like TCL and Python are desired skills. You should also have knowledge of Interfacing FPGA to ADC, DACs and experience in FPGA on-chip debugging with Chipscope/ Signaltap. Test bench development in VHDL / Verilog / System Verilog and familiarity with hardware test equipment like High-Speed DSO, Logic Analyzer, Spectrum Analyzer, Network Analyzers, Traffic Generators, etc. are important aspects of this role. Understanding of high-speed Microprocessors / Micro-controllers, L2/L3 switching, TCP/IP, and other networking protocols is beneficial. Knowledge of Hardware Schematics, Quality Process, and Configuration Management tools is also required for this position. Good oral and written communication skills, strong organizational, presentation, and motivational skills are essential qualities. The ideal candidate should have 3 to 5 years of experience in FPGA Development and hold a BE / B.Tech / M.Tech degree in Electronics & Communication Engineering.,

Position: Design Verification Engineer Experience: 48 Years We are looking for a skilled Design Verification Engineer with hands-on experience in MIPI protocols and Display IP. For any queries or further details, feel free to reach me at karthik.adasu@Proxilera.com Responsibilities: Experience in MIPI protocol verification (e.g., MIPI DSI, CSI). Strong hands-on experience in Display IP verification and validation. Ability to develop and execute verification plans targeting display and MIPI components. Perform RTL, gate-level, low-power simulations; ensure ISO 26262 compliance. Build SystemVerilog/UVM testbenches tailored to MIPI and Display IPs. Perform simulation and debug activities for MIPI/Display-related RTL modules. Collaborate with RTL and integration teams to resolve display and MIPI interface bugs. Integrate MIPI and Display IPs into subsystem or SoC-level test environments. Implement protocol-specific checkers, monitors, and assertions. Analyze functional coverage metrics related to display pipelines and MIPI interfaces. Work closely with post-silicon and firmware teams to validate MIPI and display functionality

We are seeking highly skilled and motivated System-on-Chip (SoC) Performance and Power modeling (PnP) Architects to join our diverse team at Arm! Our team focuses on PnP Analysis of Arm SoCs/SoPs (System-on-Package), System level infrastructure (SoC/SoP/Rackscale/Podscale) build together in pre- and post- silicon environments. Working closely with design teams and customers, we develop best-in-class silicon platforms across markets such as servers, accelerators, client, infrastructure, IoT, and automotive. Responsibilities: Efficiently drive and resolve architectural investigations and PnP tradeoff studies across various SoC (CPU, GPU, NPU, Media, IO, interconnects, memory controllers) and Platform components. Perform detailed workload characterization to identify performance bottlenecks and propose architectural solutions. Collaborate, coordinate, and drive consensus across architects, and IP teams. Conduct workload compaction to facilitate effective modeling. Create profiling and visualization frameworks to analyze with right level of abstraction. Contribute to automation for streamlining production processes Stay up-to-date on latest advancements in application development, workload characterization, and performance/power/thermal analysis Required Skills and Experience : Experience (+8 years) in SoC Performance Modeling and analysis in the semiconductor industry. A background in Electrical Engineering, Computer Engineering, or Computer Science with an expertise in computer architecture, and microarchitecture. Understanding of general-purpose CPU/GPU microarchitecture, including knowledge of areas such as processor pipelines, caches, and memory hierarchy. Proficient in C/C++ for programming for large-scale software development, familiarity with SystemC TLM, and Python scripting language skills. Excellent communication, and interpersonal skills with ability to convey effectively complicated solutions. Drive PnP analysis as an experienced SoC Performance and Power modeling Architect at Arm, focusing on diverse silicon platforms Nice To Have Skills and Experience : Knowledge of interconnect micro-architecture design, PCIe/CXL and CHI protocols. Understanding of workloads used for performance optimization under system constraints (TDP, Limits). Ability to work in a fast-paced environment with changing priorities and requirements Experience with Unix, scripting, and source control systems (e.g., Git, Subversion). In Return: We are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together to defy ordinary and shape outstanding! Partner and customer focus Teamwork and communication Creativity and innovation Team and personal development Impact and influence Deliver on your promises Accommodations at Arm At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email accommodations@arm.com . To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Hybrid Working at Arm Arm s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you. Equal Opportunities at Arm

We are seeking highly skilled and motivated System-on-Chip (SoC) Performance and Power modeling (PnP) Architects to join our diverse team at Arm! Our team focuses on PnP Analysis of Arm SoCs/SoPs (System-on-Package), System level infrastructure (SoC/SoP/Rackscale/Podscale) build together in pre- and post- silicon environments. Working closely with design teams and customers, we develop best-in-class silicon platforms across markets such as servers, accelerators, client, infrastructure, IoT, and automotive. Responsibilities: Efficiently drive and resolve architectural investigations and PnP tradeoff studies across various SoC (CPU, GPU, NPU, Media, IO, interconnects, memory controllers) and Platform components. Perform detailed workload characterization to identify performance bottlenecks and propose architectural solutions. Collaborate, coordinate, and drive consensus across architects, and IP teams. Conduct workload compaction to facilitate effective modeling. Create profiling and visualization frameworks to analyze with right level of abstraction. Contribute to automation for streamlining production processes Stay up-to-date on latest advancements in application development, workload characterization, and performance/power/thermal analysis Required Skills and Experience : Experience (+10 years) in SoC Performance Modeling and analysis in the semiconductor industry. A background in Electrical Engineering, Computer Engineering, or Computer Science with an expertise in computer architecture, and microarchitecture. Understanding of general-purpose CPU/GPU microarchitecture, including knowledge of areas such as processor pipelines, caches, and memory hierarchy. Proficient in C/C++ for programming for large-scale software development, familiarity with SystemC TLM, and Python scripting language skills. Excellent communication, and interpersonal skills with ability to convey effectively complicated solutions. Drive PnP analysis as an experienced SoC Performance and Power modeling Architect at Arm, focusing on diverse silicon platforms Nice To Have Skills and Experience : Knowledge of interconnect micro-architecture design, PCIe/CXL and CHI protocols. Understanding of workloads used for performance optimization under system constraints (TDP, Limits). Ability to work in a fast-paced environment with changing priorities and requirements Experience with Unix, scripting, and source control systems (e.g., Git, Subversion). In Return: We are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together to defy ordinary and shape outstanding! Partner and customer focus Teamwork and communication Creativity and innovation Team and personal development Impact and influence Deliver on your promises Accommodations at Arm At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email accommodations@arm.com . To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Hybrid Working at Arm Arm s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you. Equal Opportunities at Arm

Expertise in the x86 BIOS / UEFI FSP / coreboot development Expertise with x86 CPU/APU architectures and associated compilation tools Expertise in C programming Expertise with platform bring-up Expertise with standard protocols like PCIe, SPI, eSPI, ACPI, SMM Expertise with opensource coreboot project & mainboard related porting with GPIO, PCIe lanes, board fmd configs and board bring-up experience on customer platforms. Expertise on working with Intel FSP package source code and understanding of coreboot & FSP boot flow Expertise with different coreboot payloads like edk2, SeaBios, Tianocore etc Ability to read platform Hardware and Processor specifications to understand the coreboot mainboard porting required Good coreboot upstreaming exposure Familiar with coreboot boot stages, upds, memory map, FSP, devicetree concept, payloads to OS bootloader handoff Understanding of coreboot & FSP build tools and build processes Good understanding of UEFI framework concepts to port UEFI code to FSPWorking knowledge of Git for code reviews, source code management, and BIOS releases to QA. Ability to juggle tasks and respond to different teams for various requests for custom BIOS requirements. Good understanding of x86-64 architecture from BIOS developers perspective. Good understanding of UEFI BIOS Boot flow. Basic understanding of Linux Kernel like software development concepts (Kconfig). Preferred resources with valid regional work permit Location - Bangalore, Belgrade, Penang, New York

S ENIOR SOFTWARE DEVELOPMENT ENGINEER THE ROLE: AMD Datacenter team has an opening for a software Engineer to develop high performance I/O software for compute, storage and network acceleration in hyperscale, virtualized datacenters. Responsibilities include specification and development of Embedded Software for use in Linux and standalone products. This will involve designing and implementing software subsystems to control FPGA Hardware solutions. We are seeking a fast learning, dynamic engineer eager to develop their skills working with the latest FPGA technology. Skills/Experience Experience with C/C++ Experience with Python/System-C is an advantage. Experience with software development in a Linux environment Experience in firmware development, low level driver development, register interface programming, general algorithms and data structures. Experience with industrial standard devices e.g. Ethernet, PCIe, RDMA and Memory architectures DDR/SDRAM/DMA Experience in high performance and low latency, multi-threaded, high throughput SRIOV-capable PCIe-subsystem drivers for compute and network acceleration. Proven track record of delivering software projects that exceed customer quality expectations Experience in successfully executing projects which require interaction with international sites and culturally diverse teams Excellent interpersonal, written and verbal communication skills. A self-starter and team player Iterative Software Development Demonstrates software development skills and proficiency on coding projects within assigned area of responsibility Iteratively codes, debugs, and creates regressions to ensure that code performs as specified with good coverage Documents code to within acceptable standards for the organization Demonstrates a collaborative approach to learning and problem-solving, seeking out and leveraging the talent of others when necessary (e.g. mentoring, code reviews, etc.) ACADEMIC CREDENTIALS: Bachelor s or Master s degree in Computer/Software Engineering, Computer Science, or related technical discipline with 5+ to 12 yrs of experience. #LI-RP1

Ethernovias co-founders are serial technology entrepreneurs with multiple prior successful ventures together. We are well-funded and backed by some of the worlds leading technology investors, having secured $64m in Series A funding. ( Ethernovia Raises $64 Million to Accelerate the Revolution of Vehicle Networks | Business Wire ). Our financial backers include Porsche SE, Qualcomm, AMD, and Western Digital Exciting news announced January 2024: Our CEO Ramin Shirani Named MotorTrend Software-Defined Vehicle Innovator Awards Winner (ethernovia.com) September 2023: Continental and Ethernovia Announce Partnership to Develop Automotive Switch in 7nm - Ethernovia Connected Car News: Helios, Continental, Ethernovia, Avanci, BMW, Mapbox, Porsche, SEMA, Honda, UltraSense, Flex Logix, Diodes Inc., Garmin, Toyota & Caruso | auto connected car news With talented employees on 4 continents, we have filed > 50 patents to date. Join Ethernovia s team to make a lasting impact on the future of mobility. Come share in our success with pre-IPO shares, competitive compensation, and great benefits while growing your knowledge and career with world class talent. We are looking for talented engineers and leaders who have an entrepreneurial spirit and want to drive their design from concept to silicon to their next car. Job Description You will be responsible for the Ethernovia s Networking devices software stack development this may include Embedded Firmware, kernel/user mode device drivers, stack extensions, debug, and test utilities as well as automated unit/system testing. The device drivers will allow the User application, Middleware and Operating system to take full advantage of the feature rich hardware. As for the firmware it configures, controls, and monitors the communication device and interacts with the host system via device drivers to expose hardware features of the devices. Firmware code may also run as a standalone library within the device driver itself. As a part of the Software team, you will be responsible for architecture, design, implementation, testing, and integration of the firmware rolled into Ethernovia s SDK. This firmware is built ground-up for safety critical automotive application. Also, we build products with strict adherence to Functional Safety and hence every team member is required to fit into a culture of safety and best development practices. Technical Qualifications Bachelors or Master s degree in Computer Science/Software or related field. Work Experience: Minimum 10+ years of relevant experience for this position. Strong understanding of Software Development lifecycle including Architecture, Implementation and Testing fundamentals. Proficient in C/C++ Programming Language. Experience in Python is a plus. Experience with Firmware, preferably for communication devices like Ethernet. Experience with Embedded firmware, preferably for communication devices like Ethernet. Experience with integration and testing of firmware and low-level code. Hands on Experience with Hardware and embedded processors, preferably for communication devices. Expertise in efficient code practices for code footprint and performance. Nice to Have Experience with Experience with simulation and emulation platforms. GNU or similar compiler, debugging suite. Embedded programming, preferably with communication devices and hardware buses like I2C, SPI, Ethernet, USB. Building Automotive or other safety critical systems using qualification methods/processes like MISRA, ASPICE and ISO26262. Communication protocols like Ethernet MAC, PHY, Switching, TCP/IP, Security, Serdes, PCIe, NTB, and SR-IOV. Video processing standards and protocols Code Version Control and Review tools/processes like Perforce/Git, Swarm. Mixed Signal systems - Analog, Digital, Digital Signal Processing (DSP). ARM family of processors or similar embedded processors. Bootloaders like uboot or similar. Soft Skills Self-motivated and able to work effectively both independently and in a team. Excellent communication/documentation skills. Attention to details. What you ll get in return: Technology depth and breadth expansion that can t be found in a large company Opportunity to grow your career as the company grows Pre IPO stock options Cutting edge technology World class team Competitive base salary Flexible hours

Hi , Please find the below Job Description Job Title: Linux PCI Device Lead Experience: 8 to 10+ years Location: Hyderabad Key Responsibilities: Architect and Lead PCI Subsystem Development: Drive design, development, and maintenance of PCI and PCIe subsystems and drivers in the Linux kernel. Ensure seamless enumeration, configuration, power management, and hotplug support for PCI devices. Device Enablement and Bring-up: Lead platform bring-up activities involving PCI/PCIe devices (e.g., network, storage, GPU, NVMe). Validate and debug device-tree or ACPI configurations for PCI host bridges and endpoints. Kernel and Firmware Interaction: Collaborate with firmware/bootloader teams for correct BAR, MSI/MSI-X, and IOMMU configurations. Work closely with architecture teams to support secure boot and DMA protection for PCI devices. Performance and Power Optimization: Analyze PCI bandwidth, latency, and power bottlenecks. Implement ASPM, LTR, and other low-power states in compliance with PCIe specs. Debugging and Issue Resolution: Use Linux tools (lspci, setpci, tracepoints, ftrace, perf, etc.) and oscilloscopes/analyzers for low-level debugging. Root-cause platform PCI failures and compatibility issues across hardware and kernel versions. Upstream and Compliance: Contribute patches upstream to the Linux kernel PCI subsystem. Ensure compliance with PCI-SIG and Linux kernel community best practices. Cross-Team Collaboration: Interface with SoC, BIOS/UEFI, board, and validation teams to ensure robust PCIe device support across platforms. Required Expertise: Deep understanding of Linux kernel internals, especially drivers/pci and subsystems like hotplug, MSI, IOMMU, DMA API. Hands-on experience with PCIe Gen3/Gen4/Gen5 devices and related PHY bring-up issues. Familiarity with ARM64 and x86 architectures, DT/ACPI handling for PCI devices. Proficient in C programming, Linux kernel debugging (GDB, crash dumps), and tools like dmesg, lspci, pcie_check. Expertise in power management (runtime, suspend/resume flows) for PCI devices. Experience with Secure Boot, TrustZone, and virtualization passthrough (VFIO/SR-IOV) for PCIe devices is a strong plus. Experience using Yocto, Buildroot, or other embedded Linux build systems.

The Software Engineering team delivers next-generation software application enhancements and new products for a changing world. Working at the cutting edge, we design and develop software for platforms, peripherals, applications and diagnostics all with the most advanced technologies, tools, software engineering methodologies and the collaboration of internal and external partners. Join us as a Senior Principal Software Engineer on our Software Engineering team in Bangalore to do the best work of your career and make a profound social impact. What youll achieve As a Senior Software Principal Engineer, you will be responsible for developing sophisticated systems and software basis the customers business goals, needs and general business environment creating software solutions. You will: Lead the effort on UEFI Firmware Design & Development, Triage, and solution development for DELL Core BIOS.Adopt or develop CI/CD processes and tools to make our development & delivery simpler and more robust. Mentor team members in design collaboration, code reviews, development tools and processes. Take part in the full software development life cycle including development, test, continuous delivery, and field issues. Be an active member of an agile team, collaboratively realizing features through design development, test and delivery Take the first step towards your dream career Every Dell Technologies team member brings something unique to the table. Heres what we are looking for with this role: Essential Requirements 14+ years of UEFI development experience is a must. Strong problem-solving and analytical skills Agility to adapt to technologies and processes quickly Strong programming and debugging experience in C. Strong desire to work as a team and design & develop with a customer focus. Never give up attitude. Desirable Requirements Bachelors or masters degree in computer science or related field. Experience in various debug methods like Arium HDT/DCI etc

Job Overview We are seeking an experienced and highly skilled Senior SOC Design Verification Engineer with a minimum of 5 years of hands-on experience in SOC Design Verification. As a key member of our team, you will play a pivotal role in ensuring the robustness and correctness of our cutting-edge System on Chip designs. Job Description Lead and manage SOC Design Verification efforts for complex projects, ensuring the successful execution of verification plans. Develop and implement comprehensive verification strategies, test plans, and test benches for high-speed SOCs, including low-speed peripherals like I2C/I3C, SPI, UART, GPIO, QSPI, and high-speed protocols like PCIe, Ethernet, CXL, MIPI, DDR and HBM Conduct Gate-level simulations, and power-aware verification using Xprop and UPF.Collaborate closely with cross-functional teams, architects, designers, and pre/post-silicon verification teams. Analyze and implement System Verilog assertions and coverage (code, toggle, functional). Provide mentorship and technical guidance to junior verification engineers.Manage and lead a dynamic team of verification engineers, fostering a collaborative and innovative work environment. Ensure verification signoff criteria are met and documentation is comprehensive.Demonstrate dedication, hard work, and commitment to achieving project goals and deadlines. Adhere to quality standards, implement good test practices, and contribute to the continuous improvement of verification methodologies. Experience with verification tools from Synopsys and Cadence, including VCS and Xsim. Integration of third-party VIPs (Verification IP) from Synopsys and Cadence. Qualifications Bachelors degree in computer science, Electrical/Electronics Engineering, or related field. ORMasters degree in computer science, Electrical/Electronics Engineering, or related field. ORPhD in Computer Science, Electrical/Electronics Engineering, or related field. 5+ years of hands-on experience in SOC Design Verification. Expertise in UVM (Universal Verification Methodology) and System Verilog. Prior experience working on IP level and SOC level verification projects. Proficient in verification tools such as VCS, Xsim, waveform analyzers, and third-party VIP integration (e.g., Synopsys VIPs and Cadence VIPs). Hands-on experience with UFS (Universal Flash Storage), Ethernet, PCIe, CXL, MIPI protocols.Solid understanding of low-speed peripherals (I2C/I3C, SPI, UART, GPIO, QSPI) and high-speed protocols. Experience in DDR, HBM, Gate-level simulations, and power-aware verification using Xprop and UPF. Proficiency in scripting languages such as shell, Makefile, and Perl. Strong understanding of processor-based SOC verification, including native, Verilog, System Verilog, and UVM mixed environment. C-System Verilog handshake and writing C test cases for bootup verification. Excellent problem-solving, analytical, and debugging skills.

As an SSD Firmware Validation Engineer at Micron Technology, Inc., you will be responsible for defining test plans, designing test cases, and developing test scripts to validate firmware for Enterprise and Datacenter class NVMe SSD products. Your role will involve demonstrating a high degree of skills in understanding various areas of firmware such as Front End, Back end/Media management, FTL, or Security. Additionally, you will need to exhibit a strong understanding of NVMe/PCIe specifications, NVMe Cloud SSD specifications, and customer-specific requirements. Collaboration with Firmware development teams throughout the product lifecycle, identifying defects, validating fixes, and creating grey and Whitebox tests will be crucial aspects of your responsibilities. Your experience should include a Bachelor's or Master's degree in Computer Science or Engineering with over 11 years of experience in SSD Firmware Validation. Expertise in End-to-End Storage Architecture and a strong understanding of Whitebox and grey box test methods for Enterprise/Datacenter SSD Firmware would be advantageous. Hands-on experience in debugging NVMe Protocol issues using Lecroy/JDSU analyzers is highly desired. You must have the ability to prepare comprehensive test plans involving access patterns, NVMe protocols, FW test hooks, and VS commands for various firmware areas. Integrating tests into an automated test environment, collaborating with test execution teams, and driving validation plans/strategy will also be part of your role. Furthermore, you should possess good knowledge of Linux operating system debugging and proficiency in coding with Python. Effective oral and written communication skills, along with strong analytical, problem-solving, and project management abilities, are essential. Demonstrated teamwork skills, effective collaboration in a team environment, expert planning and tracking capabilities, and excellent time management skills are required. An in-depth understanding of system storage and its relationship to platform components like CPU, Memory, PCIe, drivers, OS, and firmware is crucial for this role. Micron Technology, Inc. is a global leader in innovative memory and storage solutions that aim to transform how information is used to enhance life for all individuals. By focusing on customers, technology leadership, manufacturing excellence, and operational proficiency, Micron offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory and storage products under the Micron and Crucial brands. The company's innovations play a vital role in fueling the data economy, driving advancements in artificial intelligence, and enabling 5G applications from data centers to intelligent edge devices, enhancing the client and mobile user experience. To know more about Micron Technology, Inc. and explore career opportunities, please visit micron.com/careers. If you require assistance during the application process or need reasonable accommodations, please reach out to hrsupport_india@micron.com. Micron Technology strictly prohibits the use of child labor and adheres to all relevant laws, regulations, international labor standards, and industry guidelines.,

Greetings from Leadsoc Technologies! We are currently looking for a skilled Multimedia Developer to join our team. As a Multimedia Developer, you will be responsible for Linux application programming, Linux device driver development, and working with Embedded C, MMU, and Cache policies. The ideal candidate should possess excellent debugging skills in both kernel and user space, with exposure to a variety of debugging tools. Additionally, knowledge of Multimedia, PCIe, Ethernet, TCP, I2C protocols, and DMA framework would be considered a plus. The candidate should have at least 2-5 years of experience in the field and be able to join within 0-15 days of notice period. If you are passionate about multimedia development, have strong Linux programming skills, and enjoy working with different protocols and debugging tools, we would love to hear from you. Regards, Murali,