665 Pcie Jobs - Page 4

As a Design Verification Engineer, you will be responsible for verifying complex designs such as accelerators, datapath IP, processor core subsystems, and complex interfaces/protocols using leading-edge methodologies like UVM and Formal DV. Your role will involve architecting the testbench, developing the verification environment, and defining test plans, tests, and verification methodology for block/sub-system level verification. You will collaborate with the design team to generate test plans, ensure code and functional coverage closure, integrate block testbenches at the sub-system level UVM environment, and verify integration. Additionally, you will interact with the analog co-simulation and firmware team to enable top-level chip verification aspects. Your responsibilities will also include packaging verification environments for Digital IP for seamless integration into the verification flow at different stages of execution. You will evaluate 3rd party IPs on key qualitative aspects and establish evaluation flows for home-grown and 3rd party IPs for consistent benchmarking of DV evaluation. To excel in this role, you should have a minimum B.E./B.Tech degree in Electrical/Electronics/Computer Science and 7-10+ years of experience in design verification with UVM and constrained random, coverage-based verification approaches. You must possess a strong understanding of DV concepts and the ability to develop scalable DV environment architecture for achieving first-pass DV success. Your adaptability to learn end application/systems and map them into smart verification test plans will be crucial. Excellent debugging and analytical skills, along with good interpersonal, teamwork, and communication skills, are essential for effectively driving discussions with geographically dispersed teams. Knowledge of assertion-based formal verification, standard on-chip interfaces, processor/SoC architecture, and/or DSP fundamentals will be advantageous. Experience with ASIC/SoC product DV and productization is highly desirable for this role.,

You are seeking an Embedded Software Senior Engineer who is proficient in C/C++ Programming Language and Linux. Your responsibilities will include understanding requirements, designing, developing, unit testing, and debugging Embedded Software Real-time applications, Device Drivers, Bootloader, porting, and Linux kernel. You will also be responsible for documenting Requirement Specification and Design, as well as leading a team of 3 or 4 engineers. Additionally, you will need to provide effort estimation, planning, and customer interaction. To excel in this role, you should have 2 to 10 years of experience in Embedded Software with a strong foundation in C. Expertise in the Linux kernel and Linux kernel device drivers such as PCIe, display interface (e.g., HDMI, DP), v4l2, and DRM is required. Knowledge of GPU, using APIs or CUDA programming, is also essential. Hands-on experience with embedded Linux building, Uboot configuration, kernel compilation, Linux start-up sequencing, file-systems, and debugging kernel messages for cross platforms is crucial. You should be familiar with development using Host-Target tool chains for embedded platforms and have experience in system-level debugging, reverse engineering, Linux Internals, and Protocol level knowledge of interfaces. Proficiency in debugging tools like GDB, KGDB, JTAG, ADB, as well as familiarity with tools like Logic Analyzer, DSO/CRO, and Spectrum Analyzer, will be advantageous. Sound knowledge of SW development tools such as Git, CVS, Confluence, JIRA, bit-bucket, and SourceTree is a must. A passion for learning new technologies, methodologies, strategies, and processes is desired, along with the ability to work in an aggressive, high-pressure environment. Excellent written and verbal communication skills, self-starting attitude, problem-solving mentality, and creativity are essential. You should also be proficient in documentation and able to prepare specification and design documents from requirements. Technical ownership of software driver modules is expected. Desired skills include independent leadership of a module with 3 or 4 engineers, knowledge of quality processes like CMMi and Agile Scrum, and experience with open-source software packages. Contribution to the open-source Linux kernel codebase and close cooperation with other leaders and project managers would be beneficial for this role.,

You should have a good understanding of Linux OS concepts and Linux kernel internals. Experience in developing device drivers such as PCIe, USB, and I2C is a must. Additional experience in camera, display, and GPU drivers in Linux would be advantageous. Knowledge of security modules in Linux is a plus, as well as experience in bootloader customization. Strong skills in system integration and debugging are required. Familiarity with peripheral hardware, Device Data sheets, and Schematics is important. Proficiency in IPC concepts and C programming is essential for this role.,

Role & responsibilities Strong verification expertise using Verilog and SystemVerilog, with solid understanding of UVM methodology and hands-on experience writing test-benches. Proficient in debugging testcases and verifying processor-based subsystems. Knowledge of AMBA protocols (AXI, AHB, APB) is a plus. Exposure to Arm-based SoCs and strong grasp of digital design fundamentals. Experience with scripting in Perl, TCL, Make, and Shell.

SOURCERIGHT TECHNOLOGIES (INDIA) PRIVATE LIMITED is looking for Design Verification, Pcie, SV, UVM, Ethernet (SI412FI RM 3403) to join our dynamic team and embark on a rewarding career journey Collaborate with cross-functional teams to achieve strategic outcomes Apply subject expertise to support operations, planning, and decision-making Utilize tools, analytics, or platforms relevant to the job domain Ensure compliance with policies while improving efficiency and outcomes

We are looking for a highly skilled Senior RTL Design Engineer with 8+ years of experience in designing complex digital IPs and SoCs. The ideal candidate should have strong RTL coding, micro-architecture, and synthesis knowledge, with a proven track record of successful tape-outs. Key Responsibilities: Develop RTL code in Verilog/SystemVerilog based on micro-architecture specifications Work on design partitioning, clock domain crossings, and low-power techniques Collaborate with verification, physical design, and DFT teams across the design cycle Perform lint, CDC, and synthesis with timing constraints Optimize design for area, performance, and power Participate in design reviews and documentation Requirements: 8+ years of RTL design experience in ASIC/SoC development Strong knowledge of digital design principles and SoC architecture Hands-on experience with RTL design tools (SpyGlass, Design Compiler, etc.) Experience with AMBA protocols (AXI, AHB, APB), FIFOs, arbiters, and bus interfaces Exposure to synthesis, STA constraints, and backend handoff Strong debugging, problem-solving, and communication skills How to Apply: If this role excites you, submit your updated resume at info@silcosys.com and any relevant project portfolios today. Join Silcosys Solutions Private Limited and shape the future.

Be part of the Development team that validated Sandisks flash devices. Learn and understand complex technical flash devices specifications and apply that knowledge to enhance test suite and test processes. Executed regression and end-to-end scenario test cases to validate business, system and operational requirements. Develop software tools to improve test processes. Proactively seize for test suite quality improvement plans with data analytic approach. Devise strategies for in-depth functionality and compatibility testing of complex drive features. Collaborate with Test Dev engineers, Firmware Engineers, Architects and other functional teams, independently in issue resolutions. Familiar with using Protocol Analyzers to understand and analyze traces for failure investigation. Review SanDisk UFS/eMMC embedded NAND validation requirements and influence future SanDisk product design for debug and test Work with customers to understand field bugs and to enhance the validation coverage Interface with all key stakeholders to ensure product validation meets customer expectations and needs Qualifications In depth understanding of firmware algorithms used in any NAND Flash based storage devices (SSD, eMMC, UFS, SD, USB Flash drives) or other storage devices Knowledge in any Host protocols like as UFS,

SanDisk is known for its flash memory storage solutions, including: Memory cards: Used in cameras, smartphones, and other devices. USB flash drives: Portable storage devices for transferring and storing files. Solid-state drives (SSDs): Faster, more reliable storage solutions for computers. Embedded flash products: Integrated into devices like mobile phones, tablets, and gaming systems. Were looking for a Technologist, SSD Firmware Engineer to build robust, low-level firmware for our next-gen High Bandwidth Flash Product. Youll focus on critical infrastructure components, including power management, secure initialization, and inter-processor communication (IPC) . This role involves deep collaboration with hardware teams to develop firmware for early boot stages, integrate System IPs , and enable efficient production flows , ensuring reliable and high-performance SSD operation. Qualifications Required Qualifications: Education: Bachelor s or master s degree in computer science, Electrical Engineering, or related field. Experienc

As a Formal verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Develop the verification environment and test bench and creating testcases. Develop skills in IBM Formal verification tools and methodologies. Work with design as well as other key stakeholders in resolving/debugging logic design issues and deliver a quality design Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 5 – 10 years of relevant industry experience Proven experience in Formal/Functional Verification - Demonstrated execution experience of verification of logic blocks verification. Knowledge of formal methodology, Knowledge of HDLs (Verilog, VHDL, SV), Good programming skills in python, processor core u-arch skills Exposure in developing testbench environment, debugging and triaging fails. Good communication skills and be able to work effectively in a global team environment. Drive verification coverage closure, lead verification team. Drive complex scenarios, participate in High level design discussions. Track record in leading teams. Preferred technical and professional experience Writing test plans, building random / exhaustive formal verification environment, functional and coverage analysis and debug. Good understanding of the Server System

As a Logic design Engineer in the IBM Systems division, you will be responsible for the microarchitecture design and development of features to meet Secure, high performance & low power targets of the Mainframe and / or POWER customers. Deep expertise in the implementation of functional units within the core / cache / Memory controller / Interrupt / crypto / PCIE / DLL/Test Pervassive Additional responsibilities: logic (RTL) design, timing closure, CDC analysis etc. Understand and Design Power efficient logic. Agile project planning and execution. RequirementsMasters in VLSI with demonstrated experience in the micro architecture and design of state of art Processor features to enhance high performance secure system performance. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise -8+ years of relevant experience - At least 1 generation of processor core/cache or LLC design delivery leadership. - Expertise in cache coherence protocols for symmetric multiprocessors (SMP), covering both chip SMP and multi-socket SMP. - Experience with NuCA / NuMA (Non-uniform Cache / Memory architecture) architectures and implementations. - Working knowledge of memory consistency, store ordering, weakly and strongly ordered memory. - Experience in logical and physical design of caches including directories (tags, set associative memories), data SRAM, design for low latency, multiple parallel finite state machine design, deadlock-free designs.

Key Roles & Responsibilities Post Silicon diagnostics development & validation Good understanding of IO IPs such as I2C, I3C, UART, SATA, SPI, eSPI, ACPI Understanding of PC Hardware, SoC, Chipsets, Graphics cards, BIOS, firmware etc. Knowledge of x86 / computer architecture Understanding of OS internals Solid knowledge of software development life cycle Strong analytical and problem-solving skills Must be fluent in both written and spoken English. Required Skills C/C++, Linux, x86 design, development & validation of diagnostics system software, IO peripherals I2C, I3C, UART, SATA, SPI, eSPI, ACPI etc PC hardware understanding

As a Sr. Verification Engineer specializing in SOC Verification, you will be a valuable member of the SmartSoC team, contributing your expertise to intricate SOC Verification projects. Your responsibilities will entail the technical execution of SOC Verification projects for complex ARM-based SOCs. This involves tasks such as Test Planning, Environment Architecture, and creating SV-UVM environments to ensure the successful verification of SOC designs. To excel in this role, you should possess 3 to 10 years of experience in Design Verification, coupled with excellent Communication and Presentation Skills. Your proficiency in SOC Verification is crucial, along with your expertise in Verification methodologies such as Coverage Driven Test Planning, Environment Architecting, and Verification Flow. A strong command of System Verilog is essential, as well as familiarity with methodologies like OVM, UVM, VMM, or RVM. Furthermore, your knowledge of protocols, specifically one of SATA, USB, Ethernet, or PCIE, will be highly beneficial. Your willingness and ability to adapt to new methodologies, languages, and protocols are key attributes for success in this role. This position falls under the Job Category of VLSI (Silicon Engineering) and offers opportunities in various locations including Bangalore, Chennai, Hyderabad, Noida in India, Stockholm in Sweden, and Texas in the USA. Join us at SmartSoC and be part of a dynamic team working on cutting-edge SOC Verification projects.,

Increasing digitalization and flexibility of production processes presents outstanding potential. In Digital Industries, you enable customers to unlock their full potential and drive digital transformation with a unique portfolio of automation and digitalization technologies. From hardware to software to services, Siemens has quite a lot to offer. The company blurs the boundaries between industry domains by integrating the virtual and physical, hardware and software, design and manufacturing worlds. With the rapid pace of innovation, digitalization is no longer tomorrow's idea. Siemens takes what the future promises tomorrow and makes it real for customers today. Join Siemens, where your career meets tomorrow. Siemens is looking for Siemens EDA ambassadors. The Veloce Transactor Group, part of Mentor Emulation Division R&D located in Noida, develops transactors (RTL based IPs/VIPs) for various protocol solutions in Networking, Display, Storage, Mobile, Automobile, etc. The Veloce Transactor Library currently supports more than 25 protocol solutions and is growing further. As an individual in this role, you will be responsible for developing transactor (xVIP) solutions for CCIX or PCIe based interconnect technology. Your primary responsibilities will include understanding standard specifications, developing architecture and micro-arch for the design, and writing a synthesized design using Verilog/System Verilog. Required Experience: - We are seeking a graduate with at least 1-5 years of relevant working experience with (BE/BTech/ME/MTech/MS) from a reputed engineering college. - Your experience with protocols such as PCIe, USB, Ethernet, AMBA in Design or Verification is valued. - A good understanding of IP Verification Methodologies, Verification procedures, and practices are a plus. Experience in one or more verification techniques such as simulation, emulation, acceleration, formal, etc., is beneficial. - Expertise in Verilog, SystemVerilog, and SystemC, as well as experience in developing RTL for FPGAs, ASICs, and IPs, will greatly contribute to the quality of Siemens products. - Candidates should be able to build verification test plans and environments, develop test cases, utilize VIPs, and efficiently debug defects identified during verification processes. - Exposure to object-oriented programming languages like C++ is considered an advantage. Experience in scripting languages such as Perl will also be valuable in automating tasks and improving efficiency. Engagement with customers for Deployment and R&D assistance is required. Siemens has a lot to offer, how about you Siemens - where we are always challenging ourselves to build a better future. With some of the most inquisitive minds working across the world, re-imagining the future and doing extraordinary things.,

You are invited to join Lattice Semiconductor as a SoC RTL Design Engineer in Pune, India. Lattice is a global community of engineers, designers, and specialists working in collaboration with sales, marketing, and support teams to develop cutting-edge programmable logic solutions that are revolutionizing the industry. As a SoC RTL Design Engineer at Lattice Semiconductor, you will be part of a dynamic team dedicated to IP design and full chip integration. This role offers ample opportunities to contribute, learn, innovate, and grow within a fast-paced and results-oriented environment. Key responsibilities of this role include working on FPGA projects, RTL design, SoC integration, and ensuring design quality through various quality checks. You will collaborate with architects and micro-architects to define design specifications and drive logic design efforts for key FPGA blocks and full chips. To excel in this role, you will need a BS/MS/PhD in Electronics Engineering, Electrical Engineering, Computer Science, or equivalent, along with at least 5 years of experience in logic design across multiple silicon projects. Expertise in SoC integration, familiarity with FPGA designs, and the ability to work with various teams across different sites and time zones are essential for success in this position. At Lattice, we value our employees as our greatest asset and are committed to providing a comprehensive compensation and benefits program to attract, retain, and celebrate top talent in the industry. If you thrive in a collaborative environment, are a problem-solver, and have a passion for innovation, Lattice Semiconductor may be the perfect fit for you. Join us at Lattice Semiconductor and be part of a team that is dedicated to customer success and driven by a shared commitment to excellence. To learn more about our innovative programmable design solutions, visit www.latticesemi.com and follow us on Twitter, Facebook, and RSS. At Lattice, we embrace diversity and welcome applications from all qualified candidates who can contribute to our dynamic workplace. Feel the energy at Lattice Semiconductor and discover a rewarding career where you can make a real impact in the industry.,

As a Senior FPGA Design Engineer at Prodigy Technovations in Bangalore/Bengaluru, you will have the opportunity to work on existing and next-generation Protocol Analyzers and similar products. Your role will involve contributing to the entire FPGA-based product development flow, from requirement analysis to final product testing in a lab environment. Your responsibilities will include architecture/micro-architecture design, Verilog logic implementation for targeted FPGA, and writing test benches to validate the design. You will collaborate closely with board design, software, testing, and lab teams to ensure the product meets customer requirements. Additionally, you will work with interfaces such as PCIe, GigE, MPHY/UFS, DPHY/CSI/DSI, USB, SD, eMMC, I3C/I2C, SPI/QSPI, among others. Qualifications: - BE/ME in Electronics from a reputed college, with a specialization in VLSI and Embedded Design being a plus. - 3 to 8 years of experience in designing and implementing FPGA-based solutions in Xilinx or Altera FPGA, preferably in FPGA-based product development. - Experience in System Design with Xilinx/Altera FPGA devices and relevant tools. - Proficiency in Verilog and/or VHDL coding. - Experience in synthesis, implementation, and using constraints to achieve timing requirements. - Knowledge of high-speed FPGA designs and Static Timing Analysis (STA) is advantageous. - Experience in building test benches for verification, board-level testing, and system debugging. - Familiarity with protocols like UFS, UniPro, USB, Ethernet, PCIe, I3C, I2C, SPI, QSPI, UART, JTAG, SPMI, RFFE, SD, eMMC. - Hands-on experience with FPGA debugging tools, oscilloscopes, and Logic Analyzers. - Strong problem-solving and debugging skills. If you are a motivated and experienced FPGA Design Engineer with a passion for product development and a strong background in FPGA technologies, we encourage you to apply for this exciting opportunity. Join our team at Prodigy Technovations and be part of creating cutting-edge solutions for top semiconductor companies.,

You are an experienced FPGA design engineer with over 3 years of experience, based in Vadodara, India. Your primary responsibility will be implementing control logic state machines and DSP algorithms in FPGA fabric for high throughput systems. You must possess excellent troubleshooting and debugging skills for both simulation and in-circuit scenarios. Your expertise should include continual integration of unit modules into FPGA top-level design, using SignalTap to debug logic and/or timing issues, constructing bypasses, data taps, and data pattern generators for isolation, managing timing closure and constraints files, and creating basic glue logic between DSP blocks. You should also be capable of power estimation pre and post-implementation, working closely with board designers for optimal pin-out mappings, and collaborating with software team members to develop, execute, and debug unit and system-level verification tests. Your technical skills should encompass working with HDL simulation tools like ModelSim, Verilog HDL/VHDL languages, Xilinx/Altera FPGAs using Quartus II/Vivado/ISE, and SignalTap/Chipscope for debugging. Additionally, you should be comfortable taking ownership of projects and related tasks. Experience with SoC and QSYS, protocols such as AMBA, AXI, Avalon, USB, PCIe, memory interfaces like DDR2/DDR3/DDR4, and control buses like I2C and SPI/QSPI would be beneficial. About A&W Engineering Works, the organization's mission is to develop and deploy innovative solutions to real-world problems. The team at A&W Engineering Works specializes in developing complete systems from front-end sensors to back-end applications, including analog, digital signal processing, algorithmic data, and control paths. The team's expertise spans hardware, software, mechanical, and system development, enabling them to tackle complex challenges with innovative development techniques. To apply for this role, please send your resume and cover letter to [email protected] with the job title in the subject line.,

Qualcomm India Private Limited is seeking a qualified Hardware Design Engineer with 5-8 years of experience in ASIC IP cores design to join their Engineering Group. In this role, you will be responsible for working independently on peripheral IPs, designing and proposing microarchitecture solutions, guiding and mentoring junior team members, and collaborating with external teams to resolve cross-team dependencies. Additionally, you will be expected to take complete ownership of one or more projects and drive them independently. The ideal candidate should possess a Bachelor's degree in Electrical Engineering (Master's degree preferred) and have a strong knowledge of AMBA protocols such as AXI, AHB, and APB. Experience with SoC clocking, reset, debug architecture, and peripherals like USB, PCIE, and Ethernet is desirable. Hands-on experience in Low power design, Multi Clock designs, and Asynchronous interfaces is required. Proficiency in using ASIC development tools like Lint, CDC, Design compiler, and Primetime is necessary. Furthermore, the successful candidate should have a good understanding of constraint development, timing closure, and synthesis concepts. Strong experience in micro architecting RTL design from high-level design specification is essential. Proficiency in System Verilog, Verilog, C/C++, Perl, and Python is a plus. Excellent problem-solving, communication, and teamwork skills are mandatory for this role. The ability to lead a small design team and work with minimal supervision is also required. Minimum qualifications for this position include a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or a related field with at least 3 years of Hardware Engineering experience. Alternatively, a Master's degree with 2+ years of relevant experience or a PhD with 1+ year of experience will also be considered. As a Hardware Design Engineer at Qualcomm, you will leverage your knowledge and experience to plan, optimize, verify, and test electronic systems. You will collaborate with various teams to implement new requirements and incorporate the latest test solutions to improve yield, test time, and quality. Your responsibilities will also include evaluating and developing manufacturing solutions for leading-edge products, ensuring reliability, and identifying potential design flaws or compatibility issues. This role requires independent work with minimal supervision, providing guidance to team members, and making decisions that may impact work beyond the immediate team. Strong verbal and written communication skills are essential for conveying information effectively. Problem-solving and prioritization skills will be necessary to complete tasks efficiently. If you meet the qualifications and are interested in joining Qualcomm's dynamic team, we encourage you to apply for this exciting opportunity.,

As a Silicon Design Engineer with over 5 years of experience in RTL design and development, you will be responsible for creating RTL designs and developing various documents such as requirements specification, design, user guides, etc. Your expertise in FPGA VHDL and/or Verilog design using Xilinx technology and tools will be crucial in this role. Additionally, your experience with Ethernet, PCIe, SPI, I2C, USB, GPIO, Memory architectures, DDR, SDRAM, DMA technologies, and hardware testing will be valuable assets. You should be adept at HW testing, including working with test equipment such as logic and traffic analyzers, test generators, etc. Strong debugging skills at both device and board levels will be essential. Proficiency in scripting languages like Perl, Python, or TCL will be beneficial. Your excellent interpersonal, written, and verbal communication skills will enable you to collaborate effectively with cross-functional teams. Moreover, your problem-solving and analytical skills will be put to good use in this dynamic role. If you are interested in this opportunity, please submit your updated resume to janagaradha.n@acldigital.com. Your contributions as a Silicon Design Engineer will play a vital role in the successful development of cutting-edge technology solutions.,

You are a highly experienced hardware board design engineer with a minimum of 5 years of experience. In this role based in Vadodara, India, you will be responsible for designing hardware boards, demonstrating strong systems knowledge, and the ability to understand high-level concepts efficiently to produce effective results. Your key responsibilities will include working on various stages of hardware product development cycles, specializing in high-speed board design, and demonstrating expertise in protocols such as PCIe, USB3.0, MIPI CSI/DSI, LVDS, HDMI, DDR3/4, SD/eMMC, NAND, SPI/I2C. You should have hands-on experience with peripherals like Image sensors, LCD displays, and flash memory, among others. Additionally, you must possess a good understanding of timing, pre and post signal integrity analysis, and simulation tools. Furthermore, you will be expected to have a solid background in board power supply design, including switching and linear regulators, power supply filtering, and knowledge of board design guidelines and EMI/EMC aspects. Your role will also involve board bring-up, functional testing, DVT measurements, and validation, utilizing tools like Cadence Orcad, Allegro, Visio, and Altium. As a successful candidate, you should be proficient in board level testing and adept at using lab instruments such as function generators, oscilloscopes, and multimeters. An understanding of board mechanical fitment, excellent analytical skills, and strong problem-solving abilities are essential. Moreover, you must be a collaborative team player capable of effective communication with cross-functional teams. A&W Engineering Works, the organization you will be joining, is dedicated to developing and implementing innovative solutions to real-world challenges. The company's expertise spans hardware, software, mechanical, and system development, with a focus on fast prototyping and delivering quick proof of concept while preparing for production. To apply for this position, please send your resume and cover letter to [email protected], ensuring to include the job title in the subject line.,

If you are passionate about pushing the boundaries of Design technology and thrive in a collaborative, dynamic environment, we invite you to join our team as a Design Engineer. Join us to be part of our journey in shaping the future of SoC design and innovation. Responsibilities As a creative design engineer with a knowledge of subsystems and SoCs you will be part of a team integrating IP and developing logic for SoCs. You will work with the project team to understand and review the architecture and develop the design specifications. Your key responsibilities will include writing micro-architecture specifications, developing the RTL, fixing bugs and running various design checks. You will work with the verification team to review test plans and help debug design issues. You will work with the performance analysis team to evaluate and improve subsystem performance. You will also contribute to developing and enhancing the design methodologies used by the team. You will guide and support other members of the team as needed to enable the successful completion of project activities. You will balance other opportunities such as working with Project Management on activities, plans, and schedules Required Skills and Experience: In addition to bringing your accomplishment of either Bachelors or masters degree or equivalent experience in Computer Science or Electrical/Computer Engineering. Experience of 8+ years working in design of complex compute subsystems or SoCs, you will need: Strong knowledge of digital hardware design and Verilog HDL! A thorough understanding and experience of the current design techniques for complex SoC development. Experience creating design specifications Experience developing RTL for SoC projects Experience with Perl, Python or other scripting language Desired Skills and Experience: Experience with ARM-based designs and /or ARM System Architectures Experience integrating subsystems for PCIe, LPDDR, HBM, UCIe, Ethernet Experience with SystemVerilog and verification methodologies UVM/OVM/e Experience leading small teams or projects Experience or knowledge in the following areas Synthesis and timing analysis Static design checks, including CDC, RDC, X-Propagation, Linting Power management techniques DFT and physical implementation

We are hiring 8+ years of hands-on DV experience in System Verilog/UVM.

You will be working as a BSP Engineer in the IVI / ADAS domain with approximately 6+ years of experience. Your main responsibilities will include strong embedded development experience focusing on the Design/Development/Debugging aspects of Board Support Package (BSP) for operating systems like QNX, Linux, Android, and Hypervisor embedded systems. You must have hands-on development experience in C, C++, as well as experience with drivers in QNX, Linux, and Android. Additionally, you should be comfortable working in a multi-threaded and multi-core environment, and have experience with board bring up and schematics understanding. Good communication and debugging skills are essential for this role. Your technical skillset should include proficiency in C, C++, Linux, QNX / RTOS, UART, SPI, I2C, PCIE, Ethernet, Memory/Storage drivers, Hypervisor, Camera, Display, and Audio. Experience in using debugging tools such as JTAG, Trace32, CRO, and Logic Analyzers is desirable. Key responsibilities will involve driver customization and board bring up, collaborating with cross-functional teams for smooth execution, and demonstrating strong analytical and problem-solving abilities. You will also work closely with external customers to customize and launch their new products. To qualify for this role, a Bachelor's or Master's degree is preferred. Excellent communication skills, both written and verbal, and strong debugging skills are a must. The ability to integrate with existing teams and quickly adapt to new projects is essential. Your main responsibility will be to provide direct support to OEM customers by assisting with the design, development, and debugging of reference designs SW related issues. You will help customize and optimize software to meet product requirements. It is important that you quickly understand Automotive platform Software driver architecture and can read/write technical specifications/requirements effectively.,

Qualcomm India Private Limited is seeking a skilled ASIC IP cores design engineer to join their Hardware Engineering team. In this role, you will be responsible for designing and working independently on peripheral IPs, developing design and microarchitecture solutions, guiding and mentoring junior team members, and collaborating with external teams to drive and resolve cross-team dependencies. You will take complete ownership of one or more projects and drive them independently, with the ability to provide schedule estimates and potentially manage people. To be successful in this role, you should have 5-8 years of work experience in ASIC IP cores design and hold a Bachelor's degree in Electrical Engineering, with a preference for a Master's degree. Knowledge of AMBA protocols such as AXI, AHB, and APB, as well as SoC clocking/reset/debug architecture and peripherals like USB, PCIE, and Ethernet, is preferred. Experience in low power design, multi-clock designs, and asynchronous interface is required. You should also have hands-on experience with ASIC development tools like Lint, CDC, Design compiler, and Primetime. Additionally, you should possess strong problem-solving skills, excellent communication abilities, and be a team player. Self-driven individuals who can work with minimal supervision and have experience in System Verilog, Verilog, C/C++, Perl, and Python are preferred. The ability to lead a small design team is also a plus. Qualcomm is an equal opportunity employer and is committed to providing accommodations for individuals with disabilities during the application and hiring process. If you require accommodation, you can contact Qualcomm for assistance. It is important to note that Qualcomm expects all employees to adhere to company policies and procedures, including those related to the protection of confidential information. If you are a proactive and experienced ASIC IP cores design engineer looking to work in a challenging and collaborative environment, this position at Qualcomm India Private Limited may be the right fit for you.,

About The Role We're looking for someone hungry, who wants to break out of their comfort zone, and is ready to take a founding engineer role to build something from the ground up. As Engineering Lead , you will manage our CoreOS team within the Vehicle OS organization . This team is responsible for building and maintaining the foundational layers of our embedded platform, including real-time operating systems, board support packages, and hardware abstraction layers. As a leader in this role, you'll be responsible for hiring, mentoring, and guiding a high-performing engineering team while driving technical strategy and execution across multiple programs. At Applied Intuition, you will: Lead the CoreOS engineering team responsible for foundational system software used across Vehicle OS programs Guide architecture and development of system-level components including QNX- and Android-based platforms Ensure timely and high-quality software delivery across embedded and hardware-focused initiatives Collaborate closely with product, hardware, and system integration teams to define technical requirements and deliver robust solutions Hire, mentor, and grow engineers across different levels of experience Foster a culture of engineering excellence, pragmatism, and high output We're looking for someone who has: 2+ years of experience managing high-performing embedded or systems software teams 5+ years of hands-on development experience in C/C++ for embedded systems Deep understanding of real-time operating systems such as QNX Experience working with Android-based systems, including HALs and board support packages (BSPs) Familiarity with hardware bring-up and low-level driver integration across various interfaces (SPI, I2C, UART, PCIe, USB, etc.) A proven track record of delivering production-quality software in resource-constrained environments Nice to have: Experience working with the Android Open Source Project (AOSP) Automotive domain knowledge including familiarity with CAN, LIN, and AUTOSAR Prior experience working in early-stage environments or on cross-functional hardware-software products Dont meet every single requirement? If youre excited about this role but your past experience doesnt align perfectly with every qualification in the job description, we encourage you to apply anyway. You may be just the right candidate for this or other roles. Applied Intuition is an equal opportunity employer and federal contractor or subcontractor. Consequently, the parties agree that, as applicable, they will abide by the requirements of 41 CFR 60-1.4(a), 41 CFR 60-300.5(a) and 41 CFR 60-741.5(a) and that these laws are incorporated herein by reference. These regulations prohibit discrimination against qualified individuals based on their status as protected veterans or individuals with disabilities, and prohibit discrimination against all individuals based on their race, color, religion, sex, sexual orientation, gender identity or national origin. These regulations require that covered prime contractors and subcontractors take affirmative action to employ and advance in employment individuals without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, protected veteran status or disability. The parties also agree that, as applicable, they will abide by the requirements of Executive Order 13496 (29 CFR Part 471, Appendix A to Subpart A), relating to the notice of employee rights under federal labor laws.

As a Hardware Engineer, you will play a key role in the design, debugging, and validation of cutting-edge hardware solutions for Nokias Optical Networking products. Your work will directly contribute to the development of high-performance systems that power global communications infrastructure. You will collaborate with cross-functional teams including system architects, software developers, and test engineers to bring innovative hardware designs to life. From schematic design and component selection to design analysis and lab testing, youll be involved in the full product development lifecycle. Youll have the freedom to explore new ideas and grow your technical and professional skills. Required Skills: Experience in designing boards with Microprocessors, Microcontrollers, FPGAs and CPLDs Working knowledge of high-speed interfaces like PAM4, PCIe, DRR4, SATA, USB, SGMII etc. Knowledge of various memories (DDR, NAND, NOR etc) Experience in designing boards in telecom domain Knowledge of SI and PI concepts, Timing concepts Experience with Concept HDL schematic entry Hands-on experience with lab equipment like high speed oscilloscope, signal source analyzer, spectrum analyzer, logic analyzer, bode analyzer etc. Good communication and documentation skills Role & Responsibilities: Conduct feasibility analysis during the architecture phase. Design hardware that meets requirements. Perform component selection, schematic entry, BoM release, support layout engineers, and support the manufacturing team during prototyping. Conduct board bring-up, functional testing, and support cross-functional teams during system testing and debugging issues. Debug field issues of released products.