MTS Silicon Design Engineer (RTL Design Engineer)

8 - 12 years

8 - 12 Lacs

Posted:1 day ago| Platform: Foundit logo

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Work Mode

On-site

Job Type

Full Time

Job Description

PREFERRED EXPERIENCE:

  • B.E/M.E/M.Tech or B.S/M.S in EE/CE with 8+ years of relevant experience
  • Digital design and experience with RTL design in Verilog/SystemVerilog, Knowledge of system-level architecture including buses like AXI/AHB, bridges
  • Circuit timing/STA, and practical experience with tools
  • Working knowledge of C; embedded experience a plus
  • Understanding of memory technologies such as DDR4, DDR5, LPDDR, and JEDEC standards
  • Been exposed to memory controller and PHYs from different IP vendors
  • Experienced with implementing DRAM/memory controller initialization code, memory subsystem/DDR PHYs training/calibration software
  • Version control systems such as Perforce, ICManage or Git
  • Familiar with industry standard lab tools (such as: high speed scope, compliance packages, logic analyzers) is a plus
  • Strong verbal and written communication skills
  • Should have experience working in geographically dispersed team and should be a strong team player

ACADEMIC CREDENTIALS:

  • Bachelors orMastersdegree in computer engineering/Electrical Engineeringwith 8+ yrs of exp

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