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Memory Layout Engineer

Memory Layout Engineer

Qualcomm

2 - 6 years

0 Lacs

bengaluru karnataka india

Posted:1 day ago| Platform: Foundit logo

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Skills Required

skill cadence lvs boundary conditions lvs memory architectures physical verification flow debug optimized layout design cadence virtuoso layout editor erc drc limitations drc calibre physical verification flow finfet technology layout design and verification tools

Work Mode

On-site

Job Type

Full Time

Job Description

Company

Qualcomm India Private Limited

Job Area

Engineering Services Group, Engineering Services Group > Layout Engineer

General Summary

Develops block, macro, or chip level layouts and floorplans according to project requirements, specifications, and design schematics. Applies understanding of design manuals, established processes, layout elements, and basic electronic principles to create accurate designs that meet project needs. Conducts analyses, tests, and verifies designs using different tools and techniques to identify and troubleshoot issues, and stays abreast of new verification methods. Works with multiple internal and external stakeholders to align on projects, provide updates, and resolve issues.

Minimum Qualifications

Bachelor's degree in Electrical Engineering, Computer Science, Mathematics, Electronic Engineering, or related field and 2+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience.

OR
Associate's degree in Computer Science, Mathematics, Electrical Engineering or related field and 4+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience.

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Memory Layout Engineer