3.0 - 7.0 years

0 Lacs

hyderabad, telangana, india

On-site

Key Responsibilities: Perform high-quality mesh generation for structural analysis using Hypermesh and Patran. Develop and refine GFEM and DFEM models for various components and assemblies, ensuring mesh quality and compliance with CAE standards. Prepare models for static, dynamic, and thermal FEA simulations. Interpret and apply engineering drawings and CAD data to build accurate finite element models. Ensure mesh quality and convergence to meet analysis requirements. Ensure adherence to customer-specific FEM guidelines and industry best practices. Collaborate closely with design, simulation, and test teams to validate and iterate FE models. Document meshing processes, model assumptions, an...

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Memory layout Capgemini Engineering

3.0 - 8.0 years

0 Lacs

bengaluru, karnataka, india

On-site

Job Description: 3-8 years of experience in Memory/Custom Layout design. Memory Leaf cell layout library design from scratch including top level integration. Good knowledge on different types of memory architectures. Good knowledge in optimized layout design for better performance. Sound knowledge & hands on experience in Finfet technology, layout design and DRC limitations. Proficient in physical verification flow & debug, like DRC, LVS, ERC, Boundary conditions. Good Knowledge in EM and IR run and fix. Proficient in Cadence Virtuoso layout editor and Caliber physical verification flow

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CAE Analyst Maruti Suzuki India Ltd

3.0 - 7.0 years

0 Lacs

haryana

On-site

You will be responsible for conducting Brake & Suspension CAE Analysis focusing on Strength, Durability, and NVH aspects. This will involve preparing finite element models of Vehicle Chassis components including Brake, Suspension, and Steering subsystems. You will apply loading and boundary conditions for structural, thermal, and modal analysis, with a specific emphasis on brake components. Your tasks will include conducting CAE Analysis, correlating results with actual tests, interpreting results, and preparing detailed analysis reports. - Efficient execution of CAE activities for model development, Value Enhancement, and Quality resolution projects at various product development stages wil...

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Memory Layout Engineer Capgemini Engineering

3.0 - 8.0 years

0 Lacs

bengaluru, karnataka, india

On-site

Job Description: 3-8 years of experience in Memory/Custom Layout design. Location: Bangalore Memory Leafcell layout library design from scratch including top level integration. Good knowledge on different types of memory architectures. Good knowledge in optimized layout design for better performance. Sound knowledge & hands on experience in Finfet technology, layout design and DRC limitations. Proficient in physical verification flow & debug, like DRC, LVS, ERC, Boundary conditions. Good Knowledge in EM and IR run and fix. Proficient in Cadence Virtuoso layout editor and Calibre physical verification flow

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MBRDI - EMC/EMI Capgemini Engineering

2.0 - 6.0 years

0 Lacs

karnataka

On-site

As an EMI/EMC Simulation Engineer in Bengaluru, you will be a part of the EMI/EMC Simulation Engineering team responsible for Magnetostatics applications. Your role will involve tasks such as 3D Model cleanup, meshing of Battery and related bus bars, running magnetic field analysis simulations, analyzing results, recommending counter measures, and generating reports. Key Responsibilities: - Understanding and manipulating 3D geometry for cleaning up and meshing - Setting up analysis by applying appropriate boundary conditions (electric current) and material properties (magnetic permeability) - Checking for consistency of results - Analyzing different what-if scenarios, executing use cases, an...

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