10 Finfet Technology Jobs

Principal Analog & Mixed Signal Layout Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned professional with a deep understanding of Analog and Mixed Signal Circuit Layout, bringing at least 15 years of hands-on experience to the table. Your expertise in transistor-level analog and mixed-signal layout de...

Principal Analog & Mixed Signal Layout Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned professional with a deep understanding of Analog and Mixed Signal Circuit Layout, bringing at least 15 years of hands-on experience to the table. Your expertise in transistor-level analog and mixed-signal layout de...

You should have over 10 years of experience and expertise in various aspects of analog layout and high-performance cores within the semiconductor industry. This includes working on planar and finfet technology nodes, executing mixed signal layout, and collaborating with circuit designers and CAD engineers to design custom analog mixed signal blocks. Your role will involve transistor level floorplan design in a multi-voltage, mixed-signal environment, utilizing techniques such as device matching, shielding, and minimizing parasitics. As the IC mask layout designer, you will be responsible for the physical verification of custom analog/RF mixed signal designs at both block/module and IO/ESD le...

What You ll Need: * BSEE/MS with minimum 15 years+ of relevant experience * Proficiency in static timing analysis (STA) and advanced STAmethodologies. * Strong understanding of the full flow for chip design and EDA tools/flows. * In-depth knowledge of 3DIC stacking, packaging, and their impact on timing analysis and closure. * Experience with standard cells, MEM, IO IPs, and their library modeling and usage in flow. * Proficiency in STA constraints, ECO, and power optimization flow. * Hands-on experience with SPICE simulation and STA vs SPICE correlation. * Knowledge of advanced CMOS technologies and FinFET technology at 5nm/3nm/2nm and beyond. * Coding skills in TCL and Python; familiarity ...

As an Analog Layout Engineer with 3-5 years of experience in advanced semiconductor technologies (5nm and below), you will be responsible for executing full custom layout designs for high-speed analog and mixed-signal blocks. Your expertise in custom layout design, FinFET technology nodes, and EDA tools like Cadence Virtuoso and Calibre will be crucial in collaborating closely with circuit design teams to interpret and implement layout specifications. Your key responsibilities will include performing layout verification, ensuring compliance with foundry design rules and layout best practices, addressing issues related to electromigration, IR drop (EMIR), and layout-dependent effects, as well...

Qualcomm India Private Limited is seeking a Layout Engineer to develop block, macro, or chip level layouts and floorplans according to project requirements, specifications, and design schematics. As a Layout Engineer, you will apply your understanding of design manuals, established processes, layout elements, and basic electronic principles to create accurate designs that meet project needs. You will conduct analyses, tests, and verify designs using different tools and techniques to identify and troubleshoot issues, staying abreast of new verification methods. Collaboration with multiple internal and external stakeholders to align on projects, provide updates, and resolve issues will be a ke...

Build your career with Sykatiya Technologies! Sykatiya Technologies values both technical ability and the attitude of its highly talented team, which is evident in their contributions to customer projects. The team consists of skilled engineers and experts specializing in Design Verification, DFT/Test, Physical Design, and Analog Design for ASICs. We are currently looking for an Analog Design Engineer with 3-12 years of experience to join our team in Bangalore. The ideal candidate will have experience in transceiver design for high-speed interfaces such as DDR, HBM, PCIe, USB3, and JESD204. Exposure to nodes below 22nm is a plus, as well as experience in FINFET technology and the 32G-112G ra...

As an Analog Design Engineer at Sykatiya Technologies, you will be an integral part of our highly talented team that focuses on Technical Ability and a positive Attitude. Your contributions to projects will reflect our commitment to excellence for our customers. Our team consists of skilled engineers and experts in Design Verification, DFT/Test, Physical Design, and Analog Design for ASICs. We are looking for an Analog Design Engineer with 3-12 years of experience to join our team in Bangalore. The ideal candidate will have experience in transceiver design for high-speed interfaces such as DDR, HBM, PCIe, USB3, and JESD204. Exposure to nodes below 22nm is a plus, along with experience in FIN...

We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, You Are: You are a highly skilled and motivated Physical Design Engineer with a passion for innovation and a proven track record in the semiconductor industry You thrive in dynamic environments and are adept at managing multiple projects simultaneously Your deep understanding of the full design cycle from RTL to GDSII, particularly in advanced FinFET nodes, positions you as a technical driver in your field You possess excellent communication skills, enabling you to effectively coll...

Responsibilities: - Manage and mentor a team of 8-10 senior analog designers focused on high-speed SerDes IP development across multiple projects - Define architecture specifications and circuit implementation requirements for next-generation SerDes PHY IPs - Ensure adherence to project schedules, quality metrics, power/area targets through effective team oversight - Collaborate with cross-functional teams (digital design, physical design, CAD) to integrate analog IP components - Partner with process engineering teams to enable robust analog IP across advanced FinFET nodes - Continuously drive design methodology improvements and adoption of latest EDA tools/flows - Develop and manage operati...