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Siplont technologies
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Lead DFT Engineer(8-12Years)

Lead DFT Engineer(8-12Years)

Siplont technologies

7 - 12 years

|

40 - 70 Lacs

Posted:None| Platform:

Apply

Skills Required

jtag scan insertion dft atpg design for test asic tetramax tcl mbist

Work Mode

Hybrid

Job Type

Full Time

Job Description

Position:

About the Role

Key Responsibilities

Define and own the
DFT architecture
for complex AI/ML SoCs, including scan, MBIST, LBIST, JTAG, and boundary scan strategies.
Drive
ATPG, fault modeling, pattern generation, and compression
flow for optimal coverage.
Collaborate with RTL, physical design, and verification teams to ensure seamless DFT integration.
Lead
silicon bring-up
and production test correlation efforts.
Work with test engineering teams to optimize test time and yield.
Provide technical guidance, mentoring, and review of junior engineers work.
Interface with EDA vendors to evaluate tools, flows, and methodologies for DFT improvements.

Required Skills & Experience

8+ years of hands-on DFT design and implementation for large SoCs.
Strong experience in
scan insertion, ATPG, MBIST/LBIST, boundary scan, and IJTAG
.
Proficiency in EDA tools such as
Synopsys DFTMAX/TetraMAX
, Cadence Modus, or equivalent.
Solid understanding of
ASIC design flow
, timing closure, and physical design constraints.
Experience in
silicon bring-up
and production test environments.
Excellent leadership, problem-solving, and communication skills.

Preferred Qualifications

Experience with
AI, high-performance computing, or data-center class chips
.
Knowledge of advanced process nodes (5nm/7nm).
Exposure to yield analysis and debug methodologies.

Why Join Us?

More Jobs at Siplont technologies

Lead DFT Engineer(8-12Years)

bengaluru

INR 40 - 70 Lacs

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