Lead Design Engineer

As an ASIC Design/Verification Engineer at Cadence, you will be responsible for bringing your expertise in PCIe/Storage (ONFI, XSPI, SD/eMMC) Design and Verification domain to the table. With a minimum of 3 years of experience in ASIC Design/Verification, you will showcase your proficiency in these areas while demonstrating strong debugging and communication skills. Key Responsibilities: - Utilize your expertise in PCIe/Storage Design and Verification to contribute to the success of projects - Demonstrate strong debug skills to identify and resolve issues efficiently - Communicate effectively with team members and stakeholders to ensure smooth project execution Qualifications Required: - Bachelor's degree in Electrical Engineering or related field - Minimum of 3 years of experience in ASIC Design/Verification - Expertise in PCIe/Storage (ONFI, XSPI, SD/eMMC) Design and Verification domain - Strong communication skills to collaborate effectively with team members and stakeholders At Cadence, we are dedicated to hiring and nurturing leaders and innovators who are passionate about making a real impact in the world of technology. Join us in our mission to tackle challenges that others cannot solve.,