GPU Gate Level Simulation (GLS) Sr Lead Engineer

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General Summary

• Job Summary
  

Key Responsibilities

• Lead and manage the GLS team, providing technical direction and mentorship.
• Plan, execute, and oversee gate level simulation (GLS) flows for complex SoC designs.
• Drive power-aware GLS and ensure coverage of low power verification scenarios.
• Oversee formal verification and MCP verification activities, ensuring completeness and correctness.
• Collaborate with design, DV, and other cross-functional teams to resolve issues and optimize verification strategies.
• Ensure all projects meet established timelines and quality benchmarks.
• Develop and maintain verification plans, schedules, and status reports.
• Continuously improve GLS methodologies and best practices.
• Provide regular updates to management and stakeholders.
• Required Qualifications
• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
• 8+ years of experience in gate level simulation, power-aware verification, and formal verification.
• Proven experience leading verification teams and managing multiple projects.
• Strong understanding of SoC design, verification flows, and EDA tools (e.g., VCS, Questa, Verdi).
• Hands-on experience with UPF/CPF for power-aware verification.
• Excellent problem-solving, communication, and leadership skills.
• Preferred Qualifications
• Experience with MCP verification methodologies.
• Familiarity with scripting languages (Perl, Python, TCL).
• Prior experience in graphics or multimedia SoC verification.
  

Minimum Qualifications

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.