Front-End Engineer Clocking Management

ARM Embedded Technologies

5 - 10 years

10 - 14 Lacs

bengaluru

Posted:1 day ago| Platform:

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Skills Required

automation front end networking digital design soc perl ips automotive python physical design

Work Mode

Work from Office

Job Type

Full Time

Job Description

Define and develop frontend clocking schemes across IPs and SoCs, ensuring low skew, high performance, and low power operation.
Design and validate clock macro cells including PLLs, clock dividers, muxes, and gating structures.
Collaborate with design, synthesis, and physical design teams to integrate clocking structures into the digital flow.
Ensure clock domain definitions are consistent with timing intent and support CDC methodology integration.
Develop and maintain scripts/tools (Python, TCL) to streamline clock definition management and design flow.
Debug timing-related issues across RTL and gate-level stages in partnership with physical implementation teams.
Document clocking architecture, constraint, and provide support and training for design teams.

Required Skills and Experience :

5+ years of experience in digital design, clocking architecture, or frontend implementation.
Strong understanding of SoC clocking techniques and macro cell development.
Proficiency in developing and managing constraints using SDC for synthesis and STA.
Experience with EDA tools such as PrimeTime, Design Compiler,Fusion Compiler, Genus, or Innovus.
Solid scripting skills in Python, Perl, and TCL for automation.
Familiarity with CDC methodology and domain crossing analysis.
Excellent problem-solving skills and ability to work in multi-functional teams.

Nice To Have Skills and Experience:

Exposure to low-power clocking strategies (e.g., gated clocks, multifaceted frequency scaling).
Experience with hierarchical SoC constraint flows.
Knowledge of formal verification for clock and reset structure validation.
Prior experience working in automotive, AI, or networking SoC programs.
Contributions to internal tooling or methodology IPs.

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