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Altera
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FPGA Silicon Design Verification Engineer

FPGA Silicon Design Verification Engineer

Altera

5 - 10 years

7 - 11 Lacs

bengaluru

Posted:None| Platform:

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Skills Required

c++ fpga intellectual property ethernet regression testing perl pcie silicon uvm python

Work Mode

Work from Office

Job Type

Full Time

Job Description

As a verification engineer you will work closely with design teams to architect effective and efficient testbench and verification strategies to promote effective debug and failure detection; build UVM infrastructure including monitors, drivers, and scoreboards; produce functional coverage and code coverage; monitor dashboards and regressions; analyze root cause; develop constrained random stimulus and shape content to effectively stress the design space; and create test plans to ensure functional correctness.

Qualifications:

You must possess the minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

Bachelors Degree in Electrical Engineer, Computer Engineering, or related field.

Minimum of 5Y of experience in the following:

Experience with SystemVerilog.
Experience with UVM or OVM methodology.
Experience with scripting perl/Python

Preferred Qualifications:

Masters Degree in Electrical Engineer, Computer Engineering, or related field.
Experience with using C/C++ models as golden models to compare with RTL.
Experience with code coverage.
Experience with functional coverage.
Experience with X-propagation.
Experience with multiple RTL simulators.
Experience with regression testing.
Experience creating components that are reusable from block to top.
Experience in Ethernet/PCIE/AXI/DDR protocols is an added advantage.

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FPGA Silicon Design Verification Engineer